| /llvm-project-15.0.7/llvm/include/llvm/Analysis/ |
| H A D | IVDescriptors.h | 80 IsSigned(Signed), IsOrdered(Ordered), in RecurrenceDescriptor()
257 bool isOrdered() const { return IsOrdered; } in isOrdered()
295 bool IsOrdered = false; variable
|
| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.h | 99 void selectVLXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
101 void selectVSXSEG(SDNode *Node, bool IsMasked, bool IsOrdered);
|
| H A D | RISCVISelDAGToDAG.cpp | 385 bool IsOrdered) { in selectVLXSEG() argument
419 NF, IsMasked, IsTU, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL), in selectVLXSEG()
471 bool IsOrdered) { in selectVSXSEG() argument
501 NF, IsMasked, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL), in selectVSXSEG()
1286 bool IsOrdered = IntNo == Intrinsic::riscv_vloxei || in Select() local
1318 IsMasked, IsTU, IsOrdered, IndexLog2EEW, static_cast<unsigned>(LMUL), in Select()
1492 bool IsOrdered = IntNo == Intrinsic::riscv_vsoxei || in Select() local
1518 IsMasked, /*TU*/ false, IsOrdered, IndexLog2EEW, in Select()
|
| /llvm-project-15.0.7/polly/lib/Transform/ |
| H A D | Simplify.cpp | 510 bool IsOrdered = in removeRedundantWrites() local
522 if (IsOrdered && MA->isMustWrite() && in removeRedundantWrites()
551 if (LoadedVal && IsOrdered) { in removeRedundantWrites()
|
| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.h | 1321 bool IsOrdered; variable
1328 bool IsOrdered = false)
1330 RdxDesc(RdxDesc), IsInLoop(IsInLoop), IsOrdered(IsOrdered) {
1331 assert((!IsOrdered || IsInLoop) && "IsOrdered requires IsInLoop");
1361 bool isOrdered() const { return IsOrdered; } in isOrdered()
|
| H A D | LoopVectorize.cpp | 9499 bool IsOrdered = State.ILV->useOrderedReductions(*RdxDesc); in execute() local
9517 if (IsOrdered) { in execute()
9534 } else if (IsOrdered) in execute()
|
| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | IVDescriptors.cpp | 544 const bool IsOrdered = in AddReductionVar() local
604 IsOrdered, CastInsts, MinWidthCastToRecurrenceType); in AddReductionVar()
|
| /llvm-project-15.0.7/clang/lib/Sema/ |
| H A D | SemaExpr.cpp | 12365 bool IsOrdered = IsRelational || IsThreeWay; in CheckCompareOperands() local
12451 if (!IsOrdered && LHSIsNull != RHSIsNull) { in CheckCompareOperands()
12485 if (!IsOrdered && in CheckCompareOperands()
12514 (IsOrdered ? 2 : 1) && in CheckCompareOperands()
12633 if (!IsOrdered && in CheckCompareOperands()
12659 if (!IsOrdered in CheckCompareOperands()
12737 } else if (!IsOrdered && in CheckCompareOperands()
12754 if (IsOrdered) { in CheckCompareOperands()
12763 } else if (IsOrdered) in CheckCompareOperands()
12786 if (!IsOrdered && RHSIsNull in CheckCompareOperands()
[all …]
|
| H A D | SemaOpenMP.cpp | 832 void setOrderedRegion(bool IsOrdered, const Expr *Param, in setOrderedRegion() argument
834 if (IsOrdered) in setOrderedRegion()
|
| /llvm-project-15.0.7/llvm/lib/Frontend/OpenMP/ |
| H A D | OMPIRBuilder.cpp | 2267 bool IsOrdered = (EffectiveScheduleType & OMPScheduleType::ModifierOrdered) == in applyWorkshareLoop() local
2272 if (IsOrdered) in applyWorkshareLoop()
2279 if (IsOrdered) in applyWorkshareLoop()
|
| /llvm-project-15.0.7/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 7749 bool IsOrdered = true; in parseUseListOrderIndexes() local
7759 IsOrdered &= Index == Indexes.size(); in parseUseListOrderIndexes()
7772 if (IsOrdered) in parseUseListOrderIndexes()
|