| /llvm-project-15.0.7/llvm/lib/Target/Mips/ |
| H A D | MipsTargetStreamer.h | 124 void emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
141 int16_t Imm1, int16_t Imm2, SMLoc IDLoc,
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| /llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsTargetStreamer.cpp | 204 void MipsTargetStreamer::emitII(unsigned Opcode, int16_t Imm1, int16_t Imm2, in emitII() argument
209 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitII()
253 int16_t Imm2, SMLoc IDLoc, in emitRRIII() argument
261 TmpInst.addOperand(MCOperand::createImm(Imm2)); in emitRRIII()
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCMIPeephole.cpp | 1390 int16_t Imm1 = 0, NewImm1 = 0, Imm2 = 0, NewImm2 = 0; in eliminateRedundantCompare() local
1455 NewImm2 = Imm2 = (int16_t)CMPI2->getOperand(2).getImm(); in eliminateRedundantCompare()
1459 if (Imm1 != Imm2 && (!isEqOrNe(BI2) || !isEqOrNe(BI1))) { in eliminateRedundantCompare()
1460 int Diff = Imm1 - Imm2; in eliminateRedundantCompare()
1540 if (NewImm2 != Imm2) in eliminateRedundantCompare()
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| H A D | PPCInstrInfo.cpp | 3136 static unsigned selectReg(int64_t Imm1, int64_t Imm2, unsigned CompareOpc, in selectReg() argument
3144 return Imm1 < Imm2 ? TrueReg : FalseReg; in selectReg()
3146 return Imm1 > Imm2 ? TrueReg : FalseReg; in selectReg()
3148 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
3156 return (uint64_t)Imm1 < (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
3158 return (uint64_t)Imm1 > (uint64_t)Imm2 ? TrueReg : FalseReg; in selectReg()
3160 return Imm1 == Imm2 ? TrueReg : FalseReg; in selectReg()
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| H A D | PPCISelDAGToDAG.cpp | 4845 unsigned Imm2; in tryAsSingleRLWIMI() local
4849 if (Val.getOpcode() != ISD::OR || !isInt32Immediate(Val.getOperand(1), Imm2)) in tryAsSingleRLWIMI()
4865 if (isRunOfOnes(~(Imm ^ Imm2), MB, ME) && !(~Imm & Imm2)) { in tryAsSingleRLWIMI()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | FastISel.h | 420 uint64_t Imm1, uint64_t Imm2);
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | FastISel.cpp | 2019 uint64_t Imm1, uint64_t Imm2) { in fastEmitInst_rii() argument
2029 .addImm(Imm2); in fastEmitInst_rii()
2034 .addImm(Imm2); in fastEmitInst_rii()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonConstPropagation.cpp | 2603 bool Imm1 = Src1.isImm(), Imm2 = Src2.isImm(); in evaluateHexCompare2() local
2609 } else if (Imm2) { in evaluateHexCompare2()
2619 } else if (Imm2) { in evaluateHexCompare2()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1353 Register Imm2 = Add2Def->getOperand(2).getReg(); in matchPtrAddImmedChain() local
1354 auto MaybeImm2Val = getIConstantVRegValWithLookThrough(Imm2, MRI); in matchPtrAddImmedChain()
1389 MatchInfo.Bank = getRegBank(Imm2); in matchPtrAddImmedChain()
1432 Register Imm2 = Shl2Def->getOperand(2).getReg(); in matchShiftImmedChain() local
1433 auto MaybeImm2Val = getIConstantVRegValWithLookThrough(Imm2, MRI); in matchShiftImmedChain()
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 5449 int64_t Imm1, Imm2; in parseModImm() local
5548 Imm2 = CE->getValue(); in parseModImm()
5549 if (!(Imm2 & ~0x1E)) { in parseModImm()
5551 Operands.push_back(ARMOperand::CreateModImm(Imm1, Imm2, S, Ex2)); in parseModImm()
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