| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | RDFDeadCode.cpp | 84 if (!DFG.IsCode<NodeAttrs::Stmt>(IA)) in scanInstr() 88 for (NodeAddr<RefNode*> RA : IA.Addr->members(DFG)) { in scanInstr() 96 NodeAddr<InstrNode*> IA = DA.Addr->getOwner(DFG); in processDef() local 130 scanInstr(IA, WorkQ); in collect() 162 if (DFG.IsCode<NodeAttrs::Stmt>(IA)) in collect() 165 if (IsDead(IA)) { in collect() 166 DeadInstrs.insert(IA.Id); in collect() 230 for (NodeAddr<InstrNode*> IA : DINs) { in erase() 231 NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG); in erase() 232 BA.Addr->removeMember(IA, DFG); in erase() [all …]
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| H A D | RDFCopy.cpp | 72 for (NodeAddr<InstrNode*> IA : BA.Addr->members(DFG)) { in scanBlock() 73 if (DFG.IsCode<NodeAttrs::Stmt>(IA)) { in scanBlock() 74 NodeAddr<StmtNode*> SA = IA; in scanBlock() 89 NodeAddr<InstrNode*> IA) { in getLocalReachingDef() argument 90 NodeAddr<RefNode*> RA = L.getNearestAliasedRef(RefRR, IA); in getLocalReachingDef() 164 NodeAddr<InstrNode*> IA = UA.Addr->getOwner(DFG); in run() local 165 assert(DFG.IsCode<NodeAttrs::Stmt>(IA)); in run() 166 NodeId AtUse = getLocalReachingDef(SR, IA); in run() 176 << *NodeAddr<StmtNode*>(IA).Addr->getCode(); in run() 197 auto FC = CopyMap.find(IA.Id); in run()
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| H A D | HexagonRDFOpt.cpp | 95 bool rewrite(NodeAddr<InstrNode*> IA, SetVector<NodeId> &Remove); 96 void removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum); 189 void HexagonDCE::removeOperand(NodeAddr<InstrNode*> IA, unsigned OpNum) { in removeOperand() argument 190 MachineInstr *MI = NodeAddr<StmtNode*>(IA).Addr->getCode(); in removeOperand() 200 NodeList Refs = IA.Addr->members(DFG); in removeOperand() 215 bool HexagonDCE::rewrite(NodeAddr<InstrNode*> IA, SetVector<NodeId> &Remove) { in rewrite() argument 216 if (!getDFG().IsCode<NodeAttrs::Stmt>(IA)) in rewrite() 219 MachineInstr &MI = *NodeAddr<StmtNode*>(IA).Addr->getCode(); in rewrite() 258 for (NodeAddr<DefNode*> DA : IA.Addr->members_if(DFG.IsDef, DFG)) { in rewrite() 261 Defs = DFG.getRelatedRefs(IA, DA); in rewrite() [all …]
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| H A D | HexagonOptAddrMode.cpp | 181 NodeAddr<InstrNode *> IA = UA.Addr->getOwner(*DFG); in canRemoveAddasl() local 184 NodeAddr<RefNode*> AA = LV->getNearestAliasedRef(OffsetRR, IA); in canRemoveAddasl() 189 MachineInstr &UseMI = *NodeAddr<StmtNode *>(IA).Addr->getCode(); in canRemoveAddasl() 303 NodeAddr<InstrNode *> IA = UA.Addr->getOwner(*DFG); in isSafeToExtLR() local 308 NodeAddr<RefNode*> AA = LV->getNearestAliasedRef(LRExtRR, IA); in isSafeToExtLR() 322 MachineInstr *UseMI = NodeAddr<StmtNode *>(IA).Addr->getCode(); in isSafeToExtLR() 767 for (auto IA : BA.Addr->members(*DFG)) { in processBlock() local 768 if (!DFG->IsCode<NodeAttrs::Stmt>(IA)) in processBlock() 771 NodeAddr<StmtNode *> SA = IA; in processBlock() 781 << Print<NodeAddr<InstrNode *>>(IA, *DFG) << '\n'); in processBlock()
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/bugprone/ |
| H A D | easily-swappable-parameters-implicits.c | 17 void arrayAndPtr1(int *IP, int IA[]) { arrayAndPtr1(IA, IP); } in arrayAndPtr1() argument 22 void arrayAndPtr2(int *IP, int IA[8]) { arrayAndPtr2(IA, IP); } in arrayAndPtr2() 27 void arrayAndElement(int I, int IA[]) {} // NO-WARN. in arrayAndElement() argument
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| H A D | easily-swappable-parameters-implicits.cpp | 17 void arrayAndPtr1(int *IP, int IA[]) { arrayAndPtr1(IA, IP); } in arrayAndPtr1() argument 22 void arrayAndPtr2(int *IP, int IA[8]) { arrayAndPtr2(IA, IP); } in arrayAndPtr2() 27 void arrayAndElement(int I, int IA[]) {} // NO-WARN. in arrayAndElement() argument 40 void crefToArrayTypedef2(int *IA, const Point2D &P) {} in crefToArrayTypedef2() argument
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| /llvm-project-15.0.7/llvm/test/CodeGen/X86/ |
| H A D | peep-test-3.ll | 7 define void @or(ptr %A, i32 %IA, i32 %N) nounwind { 24 %2 = xor i32 %IA, 1 ; <i32> [#uses=1] 37 define void @xor(ptr %A, i32 %IA, i32 %N) nounwind { 53 %2 = xor i32 %IA, 1 ; <i32> [#uses=1] 66 define void @and(ptr %A, i32 %IA, i32 %N, ptr %p) nounwind { 84 %2 = xor i32 %IA, 1 ; <i32> [#uses=1] 101 define void @test(ptr %A, i32 %IA, i32 %N, ptr %p) nounwind { 119 %2 = xor i32 %IA, 1 ; <i32> [#uses=1]
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | RDFGraph.cpp | 1007 pushClobbers(IA, DefM); in pushAllDefs() 1008 pushDefs(IA, DefM); in pushAllDefs() 1113 assert(IA.Id != 0 && RA.Id != 0); in getRelatedRefs() 1119 RA = getNextRelated(IA, RA); in getRelatedRefs() 1139 assert(IA.Id != 0 && RA.Id != 0); in getNextRelated() 1178 assert(IA.Id != 0 && RA.Id != 0); in locateNextRef() 1183 NA = getNextRelated(IA, RA); in locateNextRef() 1200 assert(IA.Id != 0 && RA.Id != 0); in getNextShadow() 1221 assert(IA.Id != 0 && RA.Id != 0); in getNextShadow() 1650 pushClobbers(IA, DefM); in linkBlockRefs() [all …]
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| H A D | RDFLiveness.cpp | 163 if (IA.Addr->getKind() == NodeAttrs::Stmt) in getAllReachingDefs() 165 assert(IA.Addr->getKind() == NodeAttrs::Phi); in getAllReachingDefs() 166 NodeAddr<PhiNode*> PA = IA; in getAllReachingDefs() 184 Owners[TA.Id] = IA; in getAllReachingDefs() 185 Blocks[Block(IA)].push_back(IA.Id); in getAllReachingDefs() 361 NodeAddr<InstrNode*> IA) { in getNearestAliasedRef() argument 362 NodeAddr<BlockNode*> BA = IA.Addr->getOwner(DFG); in getNearestAliasedRef() 364 NodeId FindId = IA.Id; in getNearestAliasedRef() 746 NBMap.insert(std::make_pair(IA.Id, BB)); in computeLiveIns() 1122 NodeAddr<InstrNode*> IA = I; in traverse() local [all …]
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| H A D | LexicalScopes.cpp | 133 if (auto *IA = DL->getInlinedAt()) { in findLexicalScope() local 134 auto I = InlinedLexicalScopeMap.find(std::make_pair(Scope, IA)); in findLexicalScope() 143 const DILocation *IA) { in getOrCreateLexicalScope() argument 144 if (IA) { in getOrCreateLexicalScope() 148 return getOrCreateLexicalScope(IA); in getOrCreateLexicalScope() 152 return getOrCreateInlinedScope(Scope, IA); in getOrCreateLexicalScope()
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| H A D | TargetRegisterInfo.cpp | 349 for (SuperRegClassIterator IA(RCA, this, true); IA.isValid(); ++IA) { in getCommonSuperRegClass() local 350 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA); in getCommonSuperRegClass() 354 firstCommonClass(IA.getMask(), IB.getMask(), this); in getCommonSuperRegClass() 369 *BestPreA = IA.getSubReg(); in getCommonSuperRegClass()
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | DebugLoc.cpp | 78 while (DILocation *IA = CurInlinedAt->getInlinedAt()) { in appendInlinedAt() local 80 if (auto *Found = Cache[IA]) { in appendInlinedAt() 85 InlinedAtLocations.push_back(IA); in appendInlinedAt() 86 CurInlinedAt = IA; in appendInlinedAt()
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| /llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/modernize/ |
| H A D | use-equals-default.cpp | 37 class IA { class 40 IA() : Field(5) {} in IA() function in IA 42 IA(int Arg1, int Arg2) {} in IA() function in IA
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| /llvm-project-15.0.7/clang/test/Sema/ |
| H A D | ms_class_layout.cpp | 100 class IA { class 102 virtual ~IA(){} in ~IA() 106 class ICh : public virtual IA {
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| /llvm-project-15.0.7/clang/utils/TableGen/ |
| H A D | MveEmitter.cpp | 907 const ImmediateArg &IA = kv.second; in genSema() local 910 switch (IA.boundsType) { in genSema() 912 lo = IA.i1; in genSema() 913 hi = IA.i2; in genSema() 934 if (!IA.ExtraCheckType.empty()) { in genSema() 936 if (!IA.ExtraCheckArgs.empty()) { in genSema() 938 StringRef Arg = IA.ExtraCheckArgs; in genSema() 1407 IA.i1 = Param->sizeInBits(); in ACLEIntrinsic() 1410 IA.i1 = 0; in ACLEIntrinsic() 1416 IA.i2 = IA.i1 + T->sizeInBits() - 1; in ACLEIntrinsic() [all …]
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| /llvm-project-15.0.7/llvm/test/Verifier/ |
| H A D | dbg.ll | 7 ; CHECK-NEXT: !{{[0-9]+}} = !DILocation(line: 0, scope: !{{[0-9]+}}, inlinedAt: ![[IA:[0-9]+]]) 8 ; CHECK-NEXT: ![[IA]] = !{}
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | RDFGraph.h | 736 void pushAllDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM); 753 NodeAddr<RefNode*> getNextRelated(NodeAddr<InstrNode*> IA, 755 NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA, 757 NodeAddr<RefNode*> getNextShadow(NodeAddr<InstrNode*> IA, 760 NodeList getRelatedRefs(NodeAddr<InstrNode*> IA, 837 locateNextRef(NodeAddr<InstrNode*> IA, NodeAddr<RefNode*> RA, 848 void pushClobbers(NodeAddr<InstrNode*> IA, DefStackMap &DM); 849 void pushDefs(NodeAddr<InstrNode*> IA, DefStackMap &DM); 850 template <typename T> void linkRefUp(NodeAddr<InstrNode*> IA, 860 NodeAddr<InstrNode*> IA = RA.Addr->getOwner(*this); in removeFromOwner() local [all …]
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| H A D | LexicalScopes.h | 186 LexicalScope *findInlinedScope(const DILocalScope *N, const DILocation *IA) { in findInlinedScope() argument 187 auto I = InlinedLexicalScopeMap.find(std::make_pair(N, IA)); in findInlinedScope() 204 const DILocation *IA = nullptr);
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| /llvm-project-15.0.7/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | DwarfDebug.h | 79 DbgEntity(const DINode *N, const DILocation *IA, DbgEntityKind ID) in DbgEntity() argument 80 : Entity(N), InlinedAt(IA), SubclassID(ID) {} in DbgEntity() 136 DbgVariable(const DILocalVariable *V, const DILocation *IA) in DbgVariable() argument 137 : DbgEntity(V, IA, DbgVariableKind) {} in DbgVariable() 237 DbgLabel(const DILabel *L, const DILocation *IA, const MCSymbol *Sym = nullptr) 238 : DbgEntity(L, IA, DbgLabelKind), Sym(Sym) {} in DbgEntity() argument
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| /llvm-project-15.0.7/clang/test/Layout/ |
| H A D | ms-x86-vtordisp.cpp | 357 struct IA { struct 360 struct __declspec(dllexport) IB : virtual IA {
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | InlineAsmLowering.cpp | 48 const InlineAsm *IA = cast<InlineAsm>(CB.getCalledOperand()); in ExtraFlags() local 49 if (IA->hasSideEffects()) in ExtraFlags() 51 if (IA->isAlignStack()) in ExtraFlags() 55 Flags |= IA->getDialect() * InlineAsm::Extra_AsmDialect; in ExtraFlags() 273 const InlineAsm *IA = cast<InlineAsm>(Call.getCalledOperand()); in lowerInlineAsm() local 354 .addExternalSymbol(IA->getAsmString().c_str()) in lowerInlineAsm()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | InlineAdvisor.cpp | 622 const auto *IA = MAM.getCachedResult<InlineAdvisorAnalysis>(M); in run() local 623 if (!IA) in run() 626 IA->getAdvisor()->print(OS); in run() 641 const auto *IA = MAMProxy.getCachedResult<InlineAdvisorAnalysis>(M); in run() local 642 if (!IA) in run() 645 IA->getAdvisor()->print(OS); in run()
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| /llvm-project-15.0.7/llvm/lib/MC/ |
| H A D | MCCodeView.cpp | 292 MCCVFunctionInfo::LineInfo &IA = I->second; in getFunctionLineEntries() local 297 FilteredLines.back().getFileNum() != IA.File || in getFunctionLineEntries() 298 FilteredLines.back().getLine() != IA.Line || in getFunctionLineEntries() 299 FilteredLines.back().getColumn() != IA.Col) { in getFunctionLineEntries() 302 FuncId, IA.File, IA.Line, IA.Col, false, false)); in getFunctionLineEntries()
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| /llvm-project-15.0.7/openmp/runtime/ |
| H A D | README.txt | 48 * IA-32 architecture 61 Supported Architectures: IA-32 architecture, Intel(R) 64, and 73 (1) On IA-32 architecture and Intel(R) 64, icc/icl versions 12.x are
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| /llvm-project-15.0.7/clang/lib/AST/ |
| H A D | MicrosoftCXXABI.cpp | 235 MSInheritanceAttr *IA = getAttr<MSInheritanceAttr>(); in getMSInheritanceModel() local 236 assert(IA && "Expected MSInheritanceAttr on the CXXRecordDecl!"); in getMSInheritanceModel() 237 return IA->getInheritanceModel(); in getMSInheritanceModel()
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