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Searched refs:Hints (Results 1 – 25 of 50) sorted by relevance

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/llvm-project-15.0.7/llvm/unittests/CodeGen/
H A DAllocationOrderTest.cpp28 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
30 AllocationOrder O(std::move(Hints), Order, false); in TEST()
35 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
42 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
49 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
58 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
68 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
75 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
82 SmallVector<MCPhysReg, 16> Hints = {1, 2, 3}; in TEST() local
91 SmallVector<MCPhysReg, 16> Hints; in TEST() local
[all …]
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DAllocationOrder.cpp35 SmallVector<MCPhysReg, 16> Hints; in create() local
37 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM, Matrix); in create()
40 if (!Hints.empty()) { in create()
42 for (unsigned I = 0, E = Hints.size(); I != E; ++I) in create()
43 dbgs() << ' ' << printReg(Hints[I], TRI); in create()
48 for (unsigned I = 0, E = Hints.size(); I != E; ++I) in create()
49 assert(is_contained(Order, Hints[I]) && in create()
52 return AllocationOrder(std::move(Hints), Order, HardHints); in create()
H A DAllocationOrder.h31 const SmallVector<MCPhysReg, 16> Hints; variable
57 return AO.Hints.end()[Pos];
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder() argument
92 : Hints(std::move(Hints)), Order(Order), in AllocationOrder()
96 return Iterator(*this, -(static_cast<int>(Hints.size()))); in begin()
118 return Reg.isPhysical() && is_contained(Hints, Reg.id()); in isHint()
/llvm-project-15.0.7/clang/lib/Sema/
H A DSemaFixItUtils.cpp108 Hints.push_back(FixItHint::CreateRemoval( in tryToFixConversion()
112 Hints.push_back(FixItHint::CreateInsertion(Begin, "*(")); in tryToFixConversion()
113 Hints.push_back(FixItHint::CreateInsertion(End, ")")); in tryToFixConversion()
115 Hints.push_back(FixItHint::CreateInsertion(Begin, "*")); in tryToFixConversion()
142 Hints.push_back(FixItHint::CreateRemoval( in tryToFixConversion()
146 Hints.push_back(FixItHint::CreateInsertion(Begin, "&(")); in tryToFixConversion()
147 Hints.push_back(FixItHint::CreateInsertion(End, ")")); in tryToFixConversion()
149 Hints.push_back(FixItHint::CreateInsertion(Begin, "&")); in tryToFixConversion()
H A DDeclSpec.cpp1136 FixItHint Hints[NumLocs]; in Finish() local
1144 Hints[I] = FixItHint::CreateRemoval(ExtraLocs[I]); in Finish()
1153 << Hints[0] << Hints[1] << Hints[2] << Hints[3] in Finish()
1154 << Hints[4] << Hints[5] << Hints[6] << Hints[7]; in Finish()
/llvm-project-15.0.7/clang/include/clang/Frontend/
H A DTextDiagnostic.h87 ArrayRef<FixItHint> Hints) override { in emitCodeContext() argument
88 emitSnippetAndCaret(Loc, Level, Ranges, Hints); in emitCodeContext()
104 ArrayRef<FixItHint> Hints);
108 void emitParseableFixits(ArrayRef<FixItHint> Hints, const SourceManager &SM);
H A DDiagnosticRenderer.h89 ArrayRef<FixItHint> Hints) = 0;
111 ArrayRef<CharSourceRange> Ranges, ArrayRef<FixItHint> Hints);
117 ArrayRef<FixItHint> Hints);
/llvm-project-15.0.7/llvm/tools/llvm-jitlink/llvm-jitlink-executor/
H A Dllvm-jitlink-executor.cpp68 addrinfo Hints{}; in openListener()
69 Hints.ai_family = AF_INET; in openListener()
70 Hints.ai_socktype = SOCK_STREAM; in openListener()
71 Hints.ai_flags = AI_PASSIVE; in openListener()
74 if (int EC = getaddrinfo(nullptr, PortStr.c_str(), &Hints, &AI)) { in openListener()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.cpp58 SmallVectorImpl<MCPhysReg> &Hints, in addHints() argument
62 CopyHints.insert(Hints.begin(), Hints.end()); in addHints()
63 Hints.clear(); in addHints()
67 Hints.push_back(Reg); in addHints()
71 Hints.push_back(Reg); in addHints()
76 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
83 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
119 if (!MRI->isReserved(PhysReg) && !is_contained(Hints, PhysReg)) in getRegAllocationHints()
129 Hints.push_back(OrderReg); in getRegAllocationHints()
157 addHints(Order, Hints, RC, MRI); in getRegAllocationHints()
[all …]
/llvm-project-15.0.7/clang-tools-extra/clang-tidy/abseil/
H A DRedundantStrcatCallsCheck.cpp46 std::vector<FixItHint> Hints; member
53 CheckResult->Hints.push_back( in removeCallLeaveArgs()
57 CheckResult->Hints.push_back( in removeCallLeaveArgs()
134 << CheckResult.Hints; in check()
/llvm-project-15.0.7/clang-tools-extra/clang-tidy/readability/
H A DConstReturnTypeCheck.cpp73 llvm::SmallVector<clang::FixItHint, 4> Hints; member
91 Result.Hints.push_back(FixItHint::CreateRemoval(Result.ConstRange)); in checkDef()
99 Result.Hints.push_back(FixItHint::CreateRemoval( in checkDef()
142 for (auto &Hint : CR.Hints) in check()
/llvm-project-15.0.7/llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/
H A DRemoteJITUtils.cpp154 addrinfo Hints{}; in connectTCPSocketImpl() local
155 Hints.ai_family = AF_INET; in connectTCPSocketImpl()
156 Hints.ai_socktype = SOCK_STREAM; in connectTCPSocketImpl()
157 Hints.ai_flags = AI_NUMERICSERV; in connectTCPSocketImpl()
159 if (int EC = getaddrinfo(Host.c_str(), PortStr.c_str(), &Hints, &AI)) in connectTCPSocketImpl()
/llvm-project-15.0.7/llvm/tools/llvm-reduce/deltas/
H A DReduceVirtualRegisters.cpp25 const std::pair<Register, SmallVector<Register, 4>> &Hints = in dropRegisterHintsFromFunction() local
27 if (Hints.second.empty()) in dropRegisterHintsFromFunction()
/llvm-project-15.0.7/libcxx/benchmarks/
H A Dmap.bench.cpp55 Hints; member
58 enum class Shuffle { None, Keys, Hints }; enumerator
78 auto& hints = R.Hints.emplace_back(); in makeTestingSets()
82 if (shuffle == Shuffle::Hints) in makeTestingSets()
287 auto H = Data.Hints[I].begin(); in run()
318 auto Third = *(Data.Hints[I].begin() + 2); in run()
406 auto H = Data.Hints[I].begin(); in run()
437 auto Third = *(Data.Hints[I].begin() + 2); in run()
526 auto H = Data.Hints[I].begin(); in run()
646 auto H = Data.Hints[I].begin(); in run()
[all …]
/llvm-project-15.0.7/clang/include/clang/Sema/
H A DSemaFixItUtils.h41 std::vector<FixItHint> Hints; member
80 Hints.clear(); in clear()
/llvm-project-15.0.7/clang/lib/Frontend/
H A DTextDiagnostic.cpp1062 ArrayRef<FixItHint> Hints, in buildFixItInsertionLine() argument
1066 if (Hints.empty() || !DiagOpts->ShowFixits) in buildFixItInsertionLine()
1070 for (ArrayRef<FixItHint>::iterator I = Hints.begin(), E = Hints.end(); in buildFixItInsertionLine()
1132 SmallVectorImpl<CharSourceRange> &Ranges, ArrayRef<FixItHint> Hints) { in emitSnippetAndCaret() argument
1144 if (Loc == LastLoc && Ranges.empty() && Hints.empty() && in emitSnippetAndCaret()
1228 FID, LineNo, sourceColMap, Hints, SM, DiagOpts.get()); in emitSnippetAndCaret()
1274 emitParseableFixits(Hints, SM); in emitSnippetAndCaret()
1313 void TextDiagnostic::emitParseableFixits(ArrayRef<FixItHint> Hints, in emitParseableFixits() argument
1320 for (ArrayRef<FixItHint>::iterator I = Hints.begin(), E = Hints.end(); in emitParseableFixits()
1328 for (ArrayRef<FixItHint>::iterator I = Hints.begin(), E = Hints.end(); in emitParseableFixits()
H A DSerializedDiagnosticPrinter.cpp81 ArrayRef<FixItHint> Hints) override;
196 ArrayRef<FixItHint> Hints,
700 ArrayRef<FixItHint> Hints, in EmitCodeContext() argument
713 for (ArrayRef<FixItHint>::iterator I = Hints.begin(), E = Hints.end(); in EmitCodeContext()
730 ArrayRef<FixItHint> Hints) { in emitCodeContext() argument
731 Writer.EmitCodeContext(Ranges, Hints, Loc.getManager()); in emitCodeContext()
/llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/
H A DLoopVectorizationPlanner.h276 const LoopVectorizeHints &Hints; variable
292 const LoopVectorizeHints &Hints, in LoopVectorizationPlanner() argument
295 PSE(PSE), Hints(Hints), ORE(ORE) {} in LoopVectorizationPlanner()
H A DLoopVectorizationLegality.cpp296 Hint *Hints[] = {&Width, &Interleave, &Force, in setHint() local
298 for (auto H : Hints) { in setHint()
848 Hints->setPotentiallyUnsafe(); in canVectorizeInstrs()
912 return OptimizationRemarkAnalysis(Hints->vectorizeAnalysisPassName(), in canVectorizeMemory()
990 if (!Requirements->getExactFPInst() || Hints->allowReordering()) in canVectorizeFPMath()
1341 if (Hints->getForce() == LoopVectorizeHints::FK_Enabled) in canVectorize()
H A DLoopVectorize.cpp1146 Hints(Hints), InterleaveInfo(IAI) {} in LoopVectorizationCostModel()
1818 const LoopVectorizeHints *Hints; member in llvm::LoopVectorizationCostModel
2134 if (Hints.getInterleave() > 1) { in isExplicitVecOuterLoop()
2138 Hints.emitRemarkWithHints(); in isExplicitVecOuterLoop()
7621 Hints.setAlreadyVectorized(); in executePlan()
9745 switch (Hints.getPredicate()) { in getScalarEpilogueLowering()
9884 Hints.setAlreadyVectorized(); in processLoopInVPlanNativePath()
10088 Hints.emitRemarkWithHints(); in processLoop()
10143 Hints.emitRemarkWithHints(); in processLoop()
10157 Hints.emitRemarkWithHints(); in processLoop()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86RegisterInfo.cpp974 SmallVectorImpl<MCPhysReg> &Hints, in getRegAllocationHints() argument
981 VirtReg, Order, Hints, MF, VRM, Matrix); in getRegAllocationHints()
990 Hints.push_back(PhysReg); in getRegAllocationHints()
995 Hints.push_back(PhysReg); in getRegAllocationHints()
999 CopyHints.insert(Hints.begin(), Hints.end()); in getRegAllocationHints()
1000 Hints.clear(); in getRegAllocationHints()
1014 for (auto Hint : Hints) { in getRegAllocationHints()
H A DX86RegisterInfo.h161 SmallVectorImpl<MCPhysReg> &Hints,
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp338 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
352 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
354 Hints.push_back(ARM::LR); in getRegAllocationHints()
357 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
376 Hints.push_back(PairedPhys); in getRegAllocationHints()
386 Hints.push_back(Reg); in getRegAllocationHints()
/llvm-project-15.0.7/llvm/include/llvm/Transforms/Vectorize/
H A DLoopVectorizationLegality.h251 GetLAA(GetLAA), ORE(ORE), Requirements(R), Hints(H), DB(DB), AC(AC), in LoopVectorizationLegality()
545 LoopVectorizeHints *Hints; variable
/llvm-project-15.0.7/clang-tools-extra/clangd/tool/
H A DCheck.cpp202 auto Hints = inlayHints(*AST, LineRange); in buildInlayHints() local
204 for (const auto &Hint : Hints) { in buildInlayHints()

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