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/llvm-project-15.0.7/llvm/unittests/Transforms/IPO/
H A DAttributorTest.cpp160 Function &F4 = *M.getFunction("func4"); in TEST_F() local
185 F1AA.canReach(A, F4); in TEST_F()
186 F6AA.canReach(A, F4); in TEST_F()
188 F7AA.canReach(A, F7FirstCB, F4); in TEST_F()
190 F9AA.instructionCanReach(A, F9FirstInst, F4); in TEST_F()
195 ASSERT_FALSE(F1AA.canReach(A, F4)); in TEST_F()
198 ASSERT_FALSE(F7AA.canReach(A, F7FirstCB, F4)); in TEST_F()
202 ASSERT_TRUE(F6AA.canReach(A, F4)); in TEST_F()
211 ASSERT_FALSE(F9AA.instructionCanReach(A, F9FirstInst, F4)); in TEST_F()
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/readability/
H A Dredundant-member-init.cpp54 struct F4 { struct
55 F4() : f() {} in F4() argument
60 F4<int> f4i; argument
61 F4<S> f4s;
H A Davoid-const-params-in-decls.cpp19 void F4(alias_type const i);
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DBitmaskEnumTest.cpp20 F4 = 8, enumerator
21 LLVM_MARK_AS_BITMASK_ENUM(F4)
71 f ^= (F2 | F4); in TEST()
75 (f ^= F4) = F3; in TEST()
/llvm-project-15.0.7/llvm/test/DebugInfo/Generic/
H A Dlinkage-name-abstract.ll21 ; struct F4 {
24 ; void F4::f5() {
28 ; F4::f5();
52 ; For F4::f5(), first we see the in-class declaration,
55 ; REF-NEXT: DW_AT_name ("F4")
123 !16 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "F4", file: !1, line: 9, size: 8,…
/llvm-project-15.0.7/clang/test/Layout/
H A Dms-x86-basic-layout.cpp599 struct F4 : A4, B { struct
601 F4() : a(0xf00000f4) {} in F4() argument
798 sizeof(F4)+
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/
H A Dskip-merging-case-block.ll41 ; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %…
43 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ]…
83 ; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %…
85 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ]…
126 ; CHECK: %fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %…
128 …%fp.0 = phi void (...)* [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %sw.bb2 ]…
137 declare void @F4(...) local_unnamed_addr
/llvm-project-15.0.7/llvm/test/tools/llvm-xray/X86/
H A Dgraph-color-simple-case.yaml38 #EDGE-DAG: F0 -> F4 [label="4.{{[0-9]*}}e+01" color="#E75339"];
47 #EDGE-DAG: F4 [label="@(4)"];
60 #VERTEX-DAG: F0 -> F4 [label=""];
69 #VERTEX-DAG: F4 [label="{@(4)|4.{{[0-9]*}}e+01}" color="#E75339"];
/llvm-project-15.0.7/llvm/test/TableGen/
H A DForeachList.td41 // CHECK: def F4
42 // CHECK: string Name = "F4";
/llvm-project-15.0.7/llvm/lib/Target/Sparc/
H A DSparcInstrFormats.td239 class F4<bits<6> op3, dag outs, dag ins, string asmstr, list<dag> pattern,
253 : F4<op3, outs, ins, asmstr, pattern, itin> {
269 : F4<op3, outs, ins, asmstr, pattern, itin> {
285 : F4<op3, outs, ins, asmstr, pattern, itin> {
302 : F4<op3, outs, ins, asmstr, pattern, itin> {
316 : F4<op3, outs, ins, asmstr, pattern, itin> {
H A DSparcRegisterInfo.td167 def F4 : Rf< 4, "F4">, DwarfRegNum<[36]>;
199 def D2 : Rd< 4, "F4", [F4, F5]>, DwarfRegNum<[74]>;
269 def Q1 : Rq< 4, "F4", [D2, D3]>;
/llvm-project-15.0.7/llvm/test/Transforms/Inline/
H A Ddebug-info-duplicate-calls.ll40 ; CHECK-DAG: [[F4:![0-9]+]] = distinct !DISubprogram(name: "f4"
44 ; CHECK-DAG: [[fcs1_f4]] = {{.*}}, scope: [[F4]], inlinedAt: [[fcs1:![0-9]+]])
51 ; CHECK-DAG: [[fcs2_f4]] = {{.*}}, scope: [[F4]], inlinedAt: [[fcs2:![0-9]+]])
/llvm-project-15.0.7/llvm/unittests/Support/
H A DCasting.cpp166 const foo *F4 = cast<foo>(B2); in TEST() local
167 EXPECT_NE(F4, null_foo); in TEST()
226 foo *F4 = dyn_cast_or_null<foo>(fub()); in TEST() local
227 EXPECT_EQ(F4, null_foo); in TEST()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCCallingConv.td85 CCIfType<[f32], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>>,
87 CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>>,
132 CCIfType<[f32, f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>
149 CCIfType<[f32], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
150 CCIfType<[f64], CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>,
196 CCAssignToReg<[F1, F2, F3, F4, F5, F6, F7, F8]>>>,
H A DPPCCallingConv.cpp87 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
/llvm-project-15.0.7/clang-tools-extra/test/clang-tidy/checkers/zircon/
H A Dtemporary-objects.cpp56 Foo F4(0); in main() local
/llvm-project-15.0.7/clang/test/SemaSYCL/
H A Dfloat128.cpp55 float F4 = ld_func(F3); in usage() local
/llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/
H A Daix-bytestring.ll4 …DB\DC\DD\DE\DF\E0\E1\E2\E3\E4\E5\E6\E7\E8\E9\EA\EB\EC\ED\EE\EF\F0\F1\F2\F3\F4\F5\F6\F7\F8\F9\FA\FB…
/llvm-project-15.0.7/clang/test/SemaObjC/
H A Dcrash-on-type-args-protocols.m35 id<X> F4(id<P, P *(> v { // expected-error {{unknown type name 'P'}} expected-error {{expected ')'}…
/llvm-project-15.0.7/clang/test/Parser/
H A Dcxx-class.cpp96 typedef void F4() {} // expected-error{{function definition declared 'typedef'}} in F4() function in F
/llvm-project-15.0.7/polly/test/ScopInfo/
H A Dcomplex-branch-structure.ll176 br i1 %E3.cmp, label %F2, label %F4
184 F4:
/llvm-project-15.0.7/llvm/utils/TableGen/
H A DX86RecognizableInstr.h82 MAP(F4, 116) \
/llvm-project-15.0.7/llvm/test/CodeGen/AMDGPU/
H A Ddagcombine-select.ll267 ; GCN-DAG: v_mov_b32_e32 [[F4:v[0-9]+]], 0x40c00000
271 ; GCN-DAG: v_cndmask_b32_e32 v{{[0-9]+}}, [[F4]], [[T4]],
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchRegisterInfo.td107 def F4 : LoongArchReg32<4, "f4", ["fa4"]>, DwarfRegNum<[36]>;
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsCallingConv.td282 CCAssignToReg<[F0, F1, F2, F3, F4, F5, F6, F7, F8, F9, F10, F11, F12, F13,
287 CCAssignToReg<[F0, F2, F4, F6, F8, F10, F12, F14, F16, F18]>>>,

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