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/llvm-project-15.0.7/llvm/test/tools/llvm-xray/X86/
H A Dgraph-diff-simple.txt27 #VCEC-DAG: F[[F0NO:[0-9]+]] [label="F0"]
54 #EC-DAG: F[[F0NO:[0-9]+]] [label="F0"]
80 #VC-DAG: F[[F0NO:[0-9]+]] [label="F0"]
92 #VC-DAG: F{{.*}}[[F0NO]] -> F{{.*}}[[N1NO]] [tooltip="F0 -> #1" label="" color="black" labelfontco…
93 #VC-DAG: F{{.*}}[[F0NO]] -> F{{.*}}[[N2NO]] [tooltip="F0 -> #2" label="" color="black" labelfontco…
94 #VC-DAG: F{{.*}}[[F0NO]] -> F{{.*}}[[N3NO]] [tooltip="F0 -> #3" label="" color="black" labelfontco…
107 #ELVL-DAG: F[[F0NO:[0-9]+]] [label="F0"]
133 #EL-DAG: F[[F0NO:[0-9]+]] [label="F0"]
160 #VL-DAG: F[[F0NO:[0-9]+]] [label="F0"]
187 #VLVC-DAG: F[[F0NO:[0-9]+]] [label="F0"]
[all …]
H A Dgraph-color-simple-case.yaml35 #EDGE-DAG: F0 -> F7 [label="7.{{[0-9]*}}e+01" color="#B00000"];
36 #EDGE-DAG: F0 -> F2 [label="2.{{[0-9]*}}e+01" color="#FC9963"];
57 #VERTEX-DAG: F0 -> F7 [label=""];
58 #VERTEX-DAG: F0 -> F2 [label=""];
59 #VERTEX-DAG: F0 -> F9 [label=""];
60 #VERTEX-DAG: F0 -> F4 [label=""];
61 #VERTEX-DAG: F0 -> F6 [label=""];
62 #VERTEX-DAG: F0 -> F1 [label=""];
63 #VERTEX-DAG: F0 -> F8 [label=""];
64 #VERTEX-DAG: F0 -> F3 [label=""];
[all …]
H A Dgraph-simple-case.yaml32 #EMPTY-NEXT: F0 -> F1 [label=""];
37 #COUNT-NEXT: F0 -> F1 [label="1"];
42 #TIME-NEXT: F0 -> F1 [label="3.8{{.*}}e-08"];
H A Dgraph-deduce-tail-call.yaml50 #EMPTY-DAG: F0 -> F1 [label=""];
59 #COUNT-DAG: F0 -> F1 [label="1"];
69 #TIME-DAG: F0 -> F1 [label="4.{{.*}}"];
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DBitmaskEnumTest.cpp16 F0 = 0, enumerator
93 EXPECT_EQ(15, ~F0); in TEST()
97 F0 = 0, enumerator
105 FlagsClass f = (FlagsClass::F1 & ~FlagsClass::F0) | FlagsClass::F2; in TEST()
111 enum Flags { F0 = 0, F1 = 1, F2 = 2, F3 = 4, LLVM_MARK_AS_BITMASK_ENUM(F3) }; enumerator
114 Flags f = F0 | F1; in getFlags()
128 F0 = 0, enumerator
140 foo::bar::FlagsInNamespace f = ~foo::bar::F0 & (foo::bar::F1 | foo::bar::F2); in TEST()
/llvm-project-15.0.7/clang/test/CXX/dcl.dcl/basic.namespace/namespace.def/namespace.memdef/
H A Dp3.cpp11 friend struct F0;
13 struct F0 member_func();
15 struct F0 { }; struct
16 F0 f0() { return S0().member_func(); } in f0()
18 N::F0 f0_var = N::f0();
/llvm-project-15.0.7/llvm/test/TableGen/
H A Dself-reference.td27 // CHECK: def F0 {
28 // CHECK: Fa as_a = F0;
29 // CHECK: Fb as_b = F0;
32 // CHECK: Fc as_c = F0;
108 def F0 : Fa, Fb<F0>, Fc<F0>;
110 Fc as_c = F0;
H A DForeachList.td25 // CHECK: def F0
26 // CHECK: string Name = "F0";
/llvm-project-15.0.7/compiler-rt/test/fuzzer/
H A Ddataflow.test41 # LLVMFuzzerTestOneInput: F0
47 IN_ABC-NOT: F0
53 IN_FUABC: F0 11100{{$}}
60 IN_FUZZR: F0 11110
69 IN_FUZZM: F0 11110
82 L20_FU: F0 11100000000000000000{{$}}
86 L20_FUZ: F0 11110000000000000000{{$}}
90 L20_FUZZ: F0 11110000000000000000{{$}}
95 L20_FUZZM: F0 11110000000000000000{{$}}
105 IN_FUZZMU: F0 111100
/llvm-project-15.0.7/clang/test/SemaCXX/
H A Denum-attr.cpp24 F0 = 1, F1 = 8 enumerator
98 case F0: break; in test()
104 case F0: break; in test()
H A Drval-references-examples.cpp95 struct F0 { struct
107 forward(F0(), get<A&>(), get<A const&>(), get<A>(), get<const A>(), in test_forward()
109 …forward(F0(), get<A&>(), get<A const&>(), get<A>(), get<const A>(), // expected-note{{in instantia… in test_forward()
/llvm-project-15.0.7/mlir/test/Dialect/Linalg/
H A Dvectorize-convolution.mlir19 // CHECK-DAG: %[[F0:.+]] = arith.constant 0.000000e+00 : f32
22 …HECK-DAG: %[[V_INPUT_R:.+]] = vector.transfer_read %[[INPUT]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
23 …ECK-DAG: %[[V_FILTER_R:.+]] = vector.transfer_read %[[FILTER]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
24 …ECK-DAG: %[[V_OUTPUT_R:.+]] = vector.transfer_read %[[OUTPUT]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
80 // CHECK-DAG: %[[F0:.+]] = arith.constant 0.000000e+00 : f32
83 …HECK-DAG: %[[V_INPUT_R:.+]] = vector.transfer_read %[[INPUT]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
84 …CK-DAG: %[[V_FILTER_R:.+]] = vector.transfer_read %[[FILTER]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
157 // CHECK-DAG: %[[F0:.+]] = arith.constant 0.000000e+00 : f32
160 …HECK-DAG: %[[V_INPUT_R:.+]] = vector.transfer_read %[[INPUT]][%[[C0]], %[[C0]], %[[C0]]], %[[F0]]
202 // CHECK-DAG: %[[F0:.+]] = arith.constant 0.000000e+00 : f32
[all …]
/llvm-project-15.0.7/clang/test/Sema/
H A Denum-attr.c24 F0 = 1, F1 = 8 enumerator
120 case F0: break; in test()
126 case F0: break; in test()
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMScheduleA57.td795 // VMOV: 3cyc "F0/F1" for imm/reg
1014 // ASIMD multiply, D-form: 5cyc F0 for r0px, 4cyc F0 for r1p0 and later
1024 // ASIMD multiply, Q-form: 6cyc F0 for r0px, 5cyc F0 for r1p0 and later
1033 // 5cyc F0 for r0px, 4cyc F0 for r1p0 and later, 1cyc for accumulate sequence
1046 // 6cyc F0 for r0px, 5cyc F0 for r1p0 and later, 2cyc for accumulate sequence
1059 // 5cyc F0 for r0px, 4cyc F0 for r1p0 and later, 1cyc for accumulate sequence
1072 // 5cyc F0 for r0px, 4cyc F0 for r1p0 and later, 2cyc for accumulate sequence
1090 // 5cyc F0 for r0px, 4cyc F0 for r1p0 and later
1469 // Crypto SHA1 xor ops: 6cyc F0/F1
1471 // Crypto SHA1 fast ops: 3cyc F0
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/Attributor/ArgumentPromotion/
H A Dinalloca.ll17 ; CHECK-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
19 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* [[F0]], align 4
39 ; IS__TUNIT____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
41 ; IS__TUNIT____-NEXT: store i32 1, i32* [[F0]], align 4
51 ; IS__CGSCC____-NEXT: [[F0:%.*]] = getelementptr [[STRUCT_SS]], %struct.ss* [[S]], i32 0, i32 0
53 ; IS__CGSCC____-NEXT: store i32 1, i32* [[F0]], align 4
/llvm-project-15.0.7/clang/test/Driver/
H A Ddarwin-iphone-defaults.m3 // CHECK: @f0() [[F0:#[0-9]+]]
29 // CHECK: attributes [[F0]] = { noinline optnone ssp{{.*}} }
/llvm-project-15.0.7/clang/test/CodeGenCUDA/
H A Dunnamed-types.cu32 template <typename F0, typename F1, typename F2>
33 __global__ void k1(float *p, F0 f0, F1 f1, F2 f2) { in k1()
/llvm-project-15.0.7/clang/test/Layout/
H A Dms-x86-basic-layout.cpp455 struct F0 : A4, B { struct
457 F0() : a(0xf00000f0) {} in F0() function
794 sizeof(F0)+
/llvm-project-15.0.7/llvm/test/MC/MachO/ARM/
H A Drelax-thumb2-branches.s29 @ CHECK: 00F0: 00000000 00000000 00000000 00000000 |................|
45 @ CHECK: 01F0: 00000000 00000000 00000000 00000000 |................|
/llvm-project-15.0.7/lld/test/COFF/
H A Dcombined-resources.test53 CHECK-NEXT: 00F0: 00000000 00000000 00000000 01000000 |................|
69 CHECK-NEXT: 01F0: 00000000 00000300 09040000 B0020000 |................|
85 CHECK-NEXT: 02F0: 45005200 41005400 4F005200 53000600 |E.R.A.T.O.R.S...|
101 CHECK-NEXT: 03F0: FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF |................|
117 CHECK-NEXT: 04F0: 9C9C9393 93ADADAD F2F2F284 84848181 |................|
133 CHECK-NEXT: 05F0: FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF |................|
149 CHECK-NEXT: 06F0: 28000000 10000000 10000000 01001800 |(...............|
165 CHECK-NEXT: 07F0: 01B31801 B31801B3 1861D06F FFFFFFFF |.........a.o....|
181 CHECK-NEXT: 08F0: FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF |................|
197 CHECK-NEXT: 09F0: FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF |................|
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/AArch64/
H A D64-bit-vector.ll22 ; NO_SLP-NEXT: [[F0:%.*]] = load float, float* [[R0]], align 4
24 ; NO_SLP-NEXT: [[ADD0:%.*]] = fadd float [[F0]], [[F0]]
/llvm-project-15.0.7/llvm/test/Transforms/SLPVectorizer/X86/
H A Dmulti_block.ll10 ; float F0 = A0;
13 ; F0+=4.0;
15 ; A[8] = 9.0 + F0;
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A Dreturn-vector.ll132 ; CHECK-DAG: lwc1 $f[[F0:[0-9]]], [[O0]]($sp)
134 ; CHECK: add.s $f0, $f[[F0]], $f[[F1]]
150 ; CHECK-DAG: ldc1 $f[[F0:[0-9]+]], 24($sp)
152 ; CHECK: add.d $f0, $f[[F1]], $f[[F0]]
247 ; CHECK-DAG: ldc1 $f[[F0:[0-9]]], 16($sp)
248 ; CHECK-DAG: sdc1 $f[[F0]], 8($4)
251 ; CHECK-DAG: sdc1 $f[[F0]], 0($4)
/llvm-project-15.0.7/llvm/test/TableGen/Common/
H A DGlobalISelEmitterCommon.td12 def F0 : Register<"f0"> { let Namespace = "MyTarget"; }
13 def FPR32 : RegisterClass<"MyTarget", [f32], 32, (add F0)>;
/llvm-project-15.0.7/mlir/test/Dialect/Tensor/
H A Dsplit-padding.mlir30 // CHECK-DAG: %[[F0:.+]] = arith.constant 0.000000e+00 : f32
40 // CHECK: tensor.yield %[[F0]] : f32

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