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Searched refs:ExtType (Results 1 – 25 of 54) sorted by relevance

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/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DHexagonBitTracker.h61 struct ExtType { struct
64 ExtType() = default;
65 ExtType(char t, uint16_t w) : Type(t), Width(w) {} in ExtType() argument
71 using RegExtMap = DenseMap<unsigned, ExtType>;
H A DHexagonBitTracker.cpp83 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::SExt, Width))); in HexagonEvaluator()
85 VRX.insert(std::make_pair(InVirtReg, ExtType(ExtType::ZExt, Width))); in HexagonEvaluator()
1241 if (F->second.Type == ExtType::SExt) in evaluateFormalCopy()
1243 else if (F->second.Type == ExtType::ZExt) in evaluateFormalCopy()
H A DHexagonISelDAGToDAG.cpp76 ISD::LoadExtType ExtType = LD->getExtensionType(); in SelectIndexedLoad() local
77 bool IsZeroExt = (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD); in SelectIndexedLoad()
131 auto getExt64 = [this,ExtType] (MachineSDNode *N, const SDLoc &dl) in SelectIndexedLoad()
133 if (ExtType == ISD::ZEXTLOAD || ExtType == ISD::EXTLOAD) { in SelectIndexedLoad()
138 if (ExtType == ISD::SEXTLOAD) in SelectIndexedLoad()
149 if (ValueVT == MVT::i64 && ExtType != ISD::NON_EXTLOAD) { in SelectIndexedLoad()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h1244 return getExtLoad(ExtType, dl, VT, Chain, Ptr, PtrInfo, MemVT,
1247 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1252 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1265 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1271 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1277 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, PtrInfo, MemVT,
1350 getLoadVP(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT,
1358 return getLoadVP(AM, ExtType, VT, dl, Chain, Ptr, Offset, Mask, EVL,
1374 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
1379 SDValue getExtLoadVP(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
[all …]
H A DTargetLowering.h1277 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT, in getLoadExtAction() argument
1284 unsigned Shift = 4 * ExtType; in getLoadExtAction()
1289 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const { in isLoadExtLegal() argument
1290 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal; in isLoadExtLegal()
1296 return getLoadExtAction(ExtType, ValVT, MemVT) == Legal || in isLoadExtLegalOrCustom()
1297 getLoadExtAction(ExtType, ValVT, MemVT) == Custom; in isLoadExtLegalOrCustom()
2321 void setLoadExtAction(unsigned ExtType, MVT ValVT, MVT MemVT, in setLoadExtAction() argument
2323 assert(ExtType < ISD::LAST_LOADEXT_TYPE && ValVT.isValid() && in setLoadExtAction()
2326 unsigned Shift = 4 * ExtType; in setLoadExtAction()
2332 for (auto ExtType : ExtTypes) in setLoadExtAction() local
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/llvm-project-15.0.7/clang/lib/CodeGen/
H A DCGOpenCLRuntime.cpp55 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in convertOpenCLSpecificType() argument
57 return getPointerType(T, "opencl." #ExtType); in convertOpenCLSpecificType()
/llvm-project-15.0.7/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td521 ISD::LoadExtType ExtType = LD->getExtensionType();
522 if (ExtType == ISD::NON_EXTLOAD)
524 if (ExtType == ISD::EXTLOAD)
531 ISD::LoadExtType ExtType = LD->getExtensionType();
532 if (ExtType == ISD::NON_EXTLOAD)
534 if (ExtType == ISD::EXTLOAD)
/llvm-project-15.0.7/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp1080 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::getArithExtendType(Val); in printArithExtend() local
1086 if (ExtType == AArch64_AM::UXTW || ExtType == AArch64_AM::UXTX) { in printArithExtend()
1090 ExtType == AArch64_AM::UXTX) || in printArithExtend()
1092 ExtType == AArch64_AM::UXTW) ) { in printArithExtend()
1098 O << ", " << AArch64_AM::getShiftExtendName(ExtType); in printArithExtend()
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeVectorTypes.cpp1805 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD() local
1851 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_VP_LOAD() local
1938 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD() local
2063 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecRes_Gather() local
2068 OpsLo, MMO, IndexTy, ExtType); in SplitVecRes_Gather()
2072 OpsHi, MMO, IndexTy, ExtType); in SplitVecRes_Gather()
4817 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD() local
4835 if (ExtType != ISD::NON_EXTLOAD) in WidenVecRes_LOAD()
4895 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_VP_LOAD() local
4924 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_MLOAD() local
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H A DSelectionDAG.cpp477 switch (ExtType) { in getExtForLoadExtType()
4442 unsigned ExtType = LD->getExtensionType(); in ComputeNumSignBits() local
4443 switch (ExtType) { in ComputeNumSignBits()
7779 ExtType = ISD::NON_EXTLOAD; in getLoad()
7780 } else if (ExtType == ISD::NON_EXTLOAD) { in getLoad()
7805 dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO)); in getLoad()
7814 ExtType, MemVT, MMO); in getLoad()
7856 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, in getExtLoad()
8046 ISD::LoadExtType ExtType, EVT VT, in getLoadVP() argument
8061 dl.getIROrder(), VTs, AM, ExtType, IsExpanding, MemVT, MMO)); in getLoadVP()
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H A DLegalizeIntegerTypes.cpp769 ISD::LoadExtType ExtType = in PromoteIntRes_LOAD() local
785 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MLOAD() local
786 if (ExtType == ISD::NON_EXTLOAD) in PromoteIntRes_MLOAD()
787 ExtType = ISD::EXTLOAD; in PromoteIntRes_MLOAD()
807 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MGATHER() local
808 if (ExtType == ISD::NON_EXTLOAD) in PromoteIntRes_MGATHER()
809 ExtType = ISD::EXTLOAD; in PromoteIntRes_MGATHER()
817 ExtType); in PromoteIntRes_MGATHER()
3551 if (ExtType == ISD::SEXTLOAD) { in ExpandIntRes_LOAD()
3558 } else if (ExtType == ISD::ZEXTLOAD) { in ExpandIntRes_LOAD()
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H A DLegalizeDAG.cpp671 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeLoadOps() local
672 if (ExtType == ISD::NON_EXTLOAD) { in LegalizeLoadOps()
737 TLI.getLoadExtAction(ExtType, Node->getValueType(0), MVT::i1) == in LegalizeLoadOps()
749 ExtType == ISD::ZEXTLOAD ? ISD::ZEXTLOAD : ISD::EXTLOAD; in LegalizeLoadOps()
757 if (ExtType == ISD::SEXTLOAD) in LegalizeLoadOps()
762 else if (ExtType == ISD::ZEXTLOAD || NVT == Result.getValueType()) in LegalizeLoadOps()
848 switch (TLI.getLoadExtAction(ExtType, Node->getValueType(0), in LegalizeLoadOps()
882 TLI.isLoadExtLegal(ExtType, LoadVT, SrcVT)) { in LegalizeLoadOps()
886 (LoadVT == SrcVT) ? ISD::NON_EXTLOAD : ExtType; in LegalizeLoadOps()
921 assert(ExtType != ISD::EXTLOAD && in LegalizeLoadOps()
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H A DLegalizeVectorOps.cpp270 ISD::LoadExtType ExtType = LD->getExtensionType(); in LegalizeOp() local
272 if (LoadedVT.isVector() && ExtType != ISD::NON_EXTLOAD) in LegalizeOp()
273 Action = TLI.getLoadExtAction(ExtType, LD->getValueType(0), LoadedVT); in LegalizeOp()
H A DDAGCombiner.cpp798 ISD::NodeType ExtType);
1282 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand()
11527 ISD::LoadExtType ExtType = in CombineExtLoad() local
12740 ISD::LoadExtType ExtType = ISD::NON_EXTLOAD; in reduceLoadWidth() local
12761 ExtType = ISD::SEXTLOAD; in reduceLoadWidth()
12789 LN->getExtensionType() != ExtType) in reduceLoadWidth()
12807 ExtType = ISD::ZEXTLOAD; in reduceLoadWidth()
12854 if (ExtType == ISD::SEXTLOAD) in reduceLoadWidth()
12857 ExtType = ISD::ZEXTLOAD; in reduceLoadWidth()
12928 if (ExtType == ISD::NON_EXTLOAD) in reduceLoadWidth()
[all …]
/llvm-project-15.0.7/clang/lib/Serialization/
H A DASTCommon.cpp218 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in TypeIdxFromBuiltin() argument
/llvm-project-15.0.7/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp264 ISD::LoadExtType ExtType; in unpackFromMemLoc() local
270 ExtType = ISD::NON_EXTLOAD; in unpackFromMemLoc()
274 ExtType, DL, LocVT, Chain, FIN, in unpackFromMemLoc()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPUISelLowering.h186 ISD::LoadExtType ExtType,
H A DR600ISelLowering.cpp1246 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad() local
1283 if (ExtType == ISD::SEXTLOAD) { // ... ones. in lowerPrivateExtLoad()
1302 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD() local
1305 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp261 enum ExtType { enum
271 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
4048 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in addPromotedInst()
4071 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension; in getOrigType()
7042 Instruction::CastOps ExtType = Instruction::ZExt; in optimizeSwitchType() local
7045 ExtType = Instruction::SExt; in optimizeSwitchType()
7049 ExtType = Instruction::SExt; in optimizeSwitchType()
7051 ExtType = Instruction::ZExt; in optimizeSwitchType()
7054 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType); in optimizeSwitchType()
7060 APInt WideConst = (ExtType == Instruction::ZExt) ? in optimizeSwitchType()
/llvm-project-15.0.7/clang/lib/AST/
H A DTypeLoc.cpp405 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getWrittenTypeSpec() argument
H A DNSAPI.cpp467 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) \ in getNSNumberFactoryMethodKind() argument
/llvm-project-15.0.7/clang/include/clang/Serialization/
H A DASTBitCodes.h1085 #define EXT_OPAQUE_TYPE(ExtType, Id, Ext) PREDEF_TYPE_##Id##_ID, argument
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86InstrInfo.td1170 ISD::LoadExtType ExtType = LD->getExtensionType();
1171 return ExtType == ISD::NON_EXTLOAD || ExtType == ISD::EXTLOAD ||
1172 ExtType == ISD::ZEXTLOAD;
1179 ISD::LoadExtType ExtType = LD->getExtensionType();
1180 if (ExtType == ISD::NON_EXTLOAD)
1182 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
1189 ISD::LoadExtType ExtType = LD->getExtensionType();
1190 if (ExtType == ISD::NON_EXTLOAD)
1192 if (ExtType == ISD::EXTLOAD && EnablePromoteAnyextLoad)
1245 ISD::LoadExtType ExtType = LD->getExtensionType();
[all …]
/llvm-project-15.0.7/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4989 ExtType = ISD::EXTLOAD; in LowerMGATHER()
5296 unsigned ExtType; in LowerLOAD() local
5298 ExtType = ISD::SIGN_EXTEND; in LowerLOAD()
5301 ExtType = ISD::ZERO_EXTEND; in LowerLOAD()
5930 ExtType = ISD::EXTLOAD; in LowerFormalArguments()
16776 ISD::NodeType ExtType = in performSignExtendSetCCCombine() local
17934 ExtType = ISD::NON_EXTLOAD; in checkValueWidth()
17951 ExtType = ISD::SEXTLOAD; in checkValueWidth()
17960 ExtType = ISD::ZEXTLOAD; in checkValueWidth()
18049 if (ExtType == ISD::SEXTLOAD) in isEquivalentMaskless()
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H A DAArch64FastISel.cpp90 AArch64_AM::ShiftExtendType ExtType = AArch64_AM::InvalidShiftExtend; member in __anon08bebcf20111::AArch64FastISel::Address
105 void setExtendType(AArch64_AM::ShiftExtendType E) { ExtType = E; } in setExtendType()
106 AArch64_AM::ShiftExtendType getExtendType() const { return ExtType; } in getExtendType()
216 unsigned RHSReg, AArch64_AM::ShiftExtendType ExtType,
1406 AArch64_AM::ShiftExtendType ExtType, in emitAddSub_rx() argument
1444 .addImm(getArithExtendImm(ExtType, ShiftImm)); in emitAddSub_rx()

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