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Searched refs:DemandedSrcElts (Results 1 – 5 of 5) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DTargetLowering.cpp709 DemandedSrcElts.setBit((j * Scale) + i); in SimplifyMultipleUseDemandedBits()
728 DemandedSrcElts.setBit(i / Scale); in SimplifyMultipleUseDemandedBits()
1210 APInt DemandedSrcElts = DemandedElts; in SimplifyDemandedBits() local
1225 if (!!DemandedSrcElts) in SimplifyDemandedBits()
1230 !DemandedSrcElts.isAllOnes()) { in SimplifyDemandedBits()
2533 DemandedSrcElts.setBit(i / Scale); in SimplifyDemandedBits()
3046 APInt DemandedSrcElts = DemandedElts; in SimplifyDemandedVectorElts() local
3055 if (!DemandedSrcElts && !Src.isUndef()) in SimplifyDemandedVectorElts()
3069 Src, DemandedSrcElts, TLO.DAG, Depth + 1); in SimplifyDemandedVectorElts()
3101 Src, DemandedSrcElts, TLO.DAG, Depth + 1); in SimplifyDemandedVectorElts()
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H A DSelectionDAG.cpp2682 APInt DemandedSrcElts = DemandedElts.zext(NumSrcElts); in isSplatValue() local
3041 APInt DemandedSrcElts = DemandedElts; in computeKnownBits() local
3051 if (!!DemandedSrcElts) { in computeKnownBits()
3066 Known = computeKnownBits(Src, DemandedSrcElts, Depth + 1); in computeKnownBits()
3643 APInt DemandedSrcElts = APInt::getAllOnes(NumSrcElts); in computeKnownBits() local
3646 DemandedSrcElts = in computeKnownBits()
4348 APInt DemandedSrcElts = APInt::getAllOnes(NumSrcElts); in ComputeNumSignBits() local
4351 DemandedSrcElts = in ComputeNumSignBits()
4365 return ComputeNumSignBits(Src, DemandedSrcElts, Depth + 1); in ComputeNumSignBits()
4393 APInt DemandedSrcElts = DemandedElts; in ComputeNumSignBits() local
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H A DDAGCombiner.cpp13023 APInt DemandedSrcElts = APInt::getLowBitsSet(SrcElts, DstElts); in visitSIGN_EXTEND_INREG() local
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1179 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedDstElts, VF); in getReplicationShuffleCost() local
1180 Cost += thisT()->getScalarizationOverhead(SrcVT, DemandedSrcElts, in getReplicationShuffleCost()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp40932 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, 2 * NumElts); in SimplifyDemandedVectorEltsForTargetNode() local
40934 if (SimplifyDemandedVectorElts(LHS, DemandedSrcElts, LHSUndef, LHSZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
40937 if (SimplifyDemandedVectorElts(RHS, DemandedSrcElts, RHSUndef, RHSZero, TLO, in SimplifyDemandedVectorEltsForTargetNode()
40944 APInt DemandedLHSElts = DemandedSrcElts & ~RHSZero; in SimplifyDemandedVectorEltsForTargetNode()
40948 APInt DemandedRHSElts = DemandedSrcElts & ~LHSZero; in SimplifyDemandedVectorEltsForTargetNode()
40965 APInt DemandedSrcElts = APIntOps::ScaleBitMask(DemandedElts, NumSrcElts); in SimplifyDemandedVectorEltsForTargetNode() local
40967 LHS, DemandedSrcElts, TLO.DAG, Depth + 1); in SimplifyDemandedVectorEltsForTargetNode()
40969 RHS, DemandedSrcElts, TLO.DAG, Depth + 1); in SimplifyDemandedVectorEltsForTargetNode()