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Searched refs:DIV2 (Results 1 – 11 of 11) sorted by relevance

/llvm-project-15.0.7/llvm/test/Transforms/SimpleLoopUnswitch/
H A Dexponential-nontrivial-unswitch-nested2.ll45 ; RUN: sort -b -k 1 | FileCheck %s --check-prefixes=LOOP-UNSCALE3-DIV2
72 ; LOOP-UNSCALE3-DIV2-COUNT-6: Loop at depth 1 containing:
73 ; LOOP-UNSCALE3-DIV2-NOT: Loop at depth 1 containing:
74 ; LOOP-UNSCALE3-DIV2-COUNT-1: Loop at depth 2 containing:
75 ; LOOP-UNSCALE3-DIV2-NOT: Loop at depth 2 containing:
76 ; LOOP-UNSCALE3-DIV2-COUNT-1: Loop at depth 3 containing:
77 ; LOOP-UNSCALE3-DIV2-NOT: Loop at depth 3 containing:
H A Dexponential-nontrivial-unswitch-nested.ll40 ; RUN: sort -b -k 1 | FileCheck %s --check-prefixes=LOOP-UNSCALE4-DIV2
65 ; LOOP-UNSCALE4-DIV2-COUNT-11: Loop at depth 1 containing:
66 ; LOOP-UNSCALE4-DIV2-COUNT-22: Loop at depth 2 containing:
67 ; LOOP-UNSCALE4-DIV2-COUNT-29: Loop at depth 3 containing:
68 ; LOOP-UNSCALE4-DIV2-NOT: Loop at depth {{[0-9]+}} containing:
/llvm-project-15.0.7/llvm/test/Transforms/Reassociate/
H A Dcanonicalize-neg-const.ll295 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[DIV1]], 7.000000e+00
296 ; CHECK-NEXT: [[ADD:%.*]] = fadd double [[A]], [[DIV2]]
310 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double 4.000000e+00, [[DIV1]]
311 ; CHECK-NEXT: [[DIV3:%.*]] = fdiv double [[DIV2]], 5.000000e+00
340 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[DIV1]], 7.000000e+00
341 ; CHECK-NEXT: [[TMP1:%.*]] = fadd double [[A]], [[DIV2]]
355 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[DIV1]], 7.000000e+00
356 ; CHECK-NEXT: [[DIV3:%.*]] = fdiv double 5.000000e+00, [[DIV2]]
385 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv double [[MUL1]], 5.000000e+00
386 ; CHECK-NEXT: [[ADD:%.*]] = fadd double [[A]], [[DIV2]]
[all …]
/llvm-project-15.0.7/llvm/test/Transforms/CodeGenPrepare/X86/
H A Dselect.ll107 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv float [[B]], [[A]]
110 ; CHECK-NEXT: [[SEL:%.*]] = phi float [ [[DIV1]], [[SELECT_TRUE_SINK]] ], [ [[DIV2]], [[SELECT_F…
199 ; CHECK-NEXT: [[DIV2:%.*]] = sdiv i32 [[B]], [[A]]
201 ; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32 [[DIV1]], i32 [[DIV2]]
/llvm-project-15.0.7/llvm/test/Transforms/InstCombine/
H A Dfdiv.ll158 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv reassoc arcp float [[X:%.*]], [[TMP1]]
159 ; CHECK-NEXT: ret float [[DIV2]]
171 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv reassoc arcp <2 x float> [[TMP1]], [[X:%.*]]
172 ; CHECK-NEXT: ret <2 x float> [[DIV2]]
186 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv fast float [[DIV1]], [[Z:%.*]]
188 ; CHECK-NEXT: ret float [[DIV2]]
199 ; CHECK-NEXT: [[DIV2:%.*]] = fdiv fast float [[Z:%.*]], [[DIV1]]
201 ; CHECK-NEXT: ret float [[DIV2]]
214 ; CHECK-NEXT: [[DIV2:%.*]] = fmul reassoc arcp float [[Y]], [[Z:%.*]]
216 ; CHECK-NEXT: ret float [[DIV2]]
H A Dshift.ll675 ; CHECK-NEXT: [[DIV2:%.*]] = udiv i32 [[A:%.*]], [[DIV]]
676 ; CHECK-NEXT: ret i32 [[DIV2]]
686 ; CHECK-NEXT: [[DIV2:%.*]] = udiv <2 x i32> [[A:%.*]], [[DIV]]
687 ; CHECK-NEXT: ret <2 x i32> [[DIV2]]
H A Ddiv.ll434 ; CHECK-NEXT: [[DIV2:%.*]] = udiv i32 [[A:%.*]], [[DIV]]
435 ; CHECK-NEXT: ret i32 [[DIV2]]
/llvm-project-15.0.7/llvm/test/Other/X86/
H A Ddebugcounter-divrempairs.ll40 ; CHECK-NEXT: [[DIV2:%.*]] = udiv i16 %a, %b
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIDefines.h234 DIV2 = 3 enumerator
H A DSIFoldOperands.cpp1372 return SIOutMods::DIV2; in getOModValue()
1384 return SIOutMods::DIV2; in getOModValue()
1396 return SIOutMods::DIV2; in getOModValue()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/MCTargetDesc/
H A DAMDGPUInstPrinter.cpp1338 else if (Imm == SIOutMods::DIV2) in printOModSI()