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/llvm-project-15.0.7/llvm/unittests/CodeGen/GlobalISel/
H A DMachineIRBuilderTest.cpp132 B.buildFAdd(S64, Copies[0], Copies[1]); in TEST_F()
133 B.buildFSub(S64, Copies[0], Copies[1]); in TEST_F()
134 B.buildFMA(S64, Copies[0], Copies[1], Copies[2]); in TEST_F()
135 B.buildFMAD(S64, Copies[0], Copies[1], Copies[2]); in TEST_F()
136 B.buildFMAD(S64, Copies[0], Copies[1], Copies[2], MachineInstr::FmNoNans); in TEST_F()
196 B.buildXor(S64, Copies[0], Copies[1]); in TEST_F()
278 B.buildSMin(S64, Copies[0], Copies[1]); in TEST_F()
279 B.buildSMax(S64, Copies[0], Copies[1]); in TEST_F()
280 B.buildUMin(S64, Copies[0], Copies[1]); in TEST_F()
281 B.buildUMax(S64, Copies[0], Copies[1]); in TEST_F()
[all …]
H A DKnownBitsTest.cpp19 unsigned CopyReg = Copies[Copies.size() - 1]; in TEST_F()
39 unsigned CopyReg = Copies[Copies.size() - 1]; in TEST_F()
78 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
112 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
150 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
187 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
226 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
254 unsigned CopyReg = Copies[Copies.size() - 1]; in TEST_F()
283 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
315 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
[all …]
H A DKnownBitsVectorTest.cpp33 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
74 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
110 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
146 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
184 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
216 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
254 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
287 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
320 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
474 Register CopyReg = Copies[Copies.size() - 1]; in TEST_F()
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H A DPatternMatchTest.cpp69 B.buildBuildVector(v4s64, {Copies[0], Copies[0], Copies[0], Copies[0]}); in TEST_F()
77 auto MIBAdd = B.buildAdd(LLT::scalar(64), Copies[0], Copies[1]); in TEST_F()
111 auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); in TEST_F()
176 auto MIBAnd = B.buildAnd(s64, Copies[0], Copies[1]); in TEST_F()
185 auto MIBOr = B.buildOr(s64, Copies[0], Copies[1]); in TEST_F()
443 auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); in TEST_F()
479 auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); in TEST_F()
512 auto MIBAdd = B.buildAdd(s64, Copies[0], Copies[1]); in TEST_F()
573 B.buildBuildVector(v4s64, {Copies[0], Copies[0], Copies[0], Copies[0]}); in TEST_F()
604 B.buildBuildVector(v4s64, {Copies[0], Copies[0], Copies[0], Copies[0]}); in TEST_F()
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H A DLegalizerHelperTest.cpp1055 {Copies[0], Copies[1]}); in TEST_F()
1633 auto SMin = B.buildSMin(s64, Copies[0], Copies[1]); in TEST_F()
1634 auto SMax = B.buildSMax(s64, Copies[0], Copies[1]); in TEST_F()
1635 auto UMin = B.buildUMin(s64, Copies[0], Copies[1]); in TEST_F()
1636 auto UMax = B.buildUMax(s64, Copies[0], Copies[1]); in TEST_F()
2875 auto MIBMin64 = B.buildFMinNum(S64, Copies[0], Copies[0]); in TEST_F()
2926 auto MIBMax64 = B.buildFMaxNum(S64, Copies[0], Copies[0]); in TEST_F()
4046 auto V1 = B.buildBuildVector(V6S64, {Copies[0], Copies[1], Copies[0], in TEST_F()
4047 Copies[1], Copies[0], Copies[1]}); in TEST_F()
4048 auto V2 = B.buildBuildVector(V6S64, {Copies[0], Copies[1], Copies[0], in TEST_F()
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H A DCSETest.cpp23 auto MIBInput = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[0]}); in TEST_F()
24 auto MIBInput1 = B.buildInstr(TargetOpcode::G_TRUNC, {s16}, {Copies[1]}); in TEST_F()
74 auto MIBUnmerge = CSEB.buildUnmerge({s32, s32}, Copies[0]); in TEST_F()
75 auto MIBUnmerge2 = CSEB.buildUnmerge({s32, s32}, Copies[0]); in TEST_F()
96 .addUse(Copies[0]) in TEST_F()
97 .addUse(Copies[1]); in TEST_F()
99 CSEB.buildInstr(TargetOpcode::G_AND, {s32}, {Copies[0], Copies[1]}); in TEST_F()
103 {Copies[0], static_cast<uint64_t>(0)}); in TEST_F()
105 {Copies[0], static_cast<uint64_t>(0)}); in TEST_F()
107 {Copies[0], static_cast<uint64_t>(1)}); in TEST_F()
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H A DGISelMITest.h95 static void collectCopies(SmallVectorImpl<Register> &Copies, in collectCopies() argument
100 Copies.push_back(MI.getOperand(0).getReg()); in collectCopies()
125 collectCopies(Copies, MF);
137 SmallVector<Register, 4> Copies; variable
H A DGISelAliasTest.cpp29 auto Base = B.buildIntToPtr(P0, Copies[0]); in TEST_F()
30 auto Base2 = B.buildIntToPtr(P0, Copies[1]); in TEST_F()
81 auto Base = B.buildIntToPtr(P0, Copies[0]); in TEST_F()
/llvm-project-15.0.7/llvm/unittests/ADT/
H A DAnyTest.cpp133 : Copies(Other.Copies + 1), Moves(Other.Moves) {} in TEST()
134 TestType(TestType &&Other) : Copies(Other.Copies), Moves(Other.Moves + 1) {} in TEST()
135 int Copies = 0; in TEST() member
141 EXPECT_EQ(0, T1.Copies); in TEST()
147 EXPECT_EQ(1, T2.Copies); in TEST()
152 EXPECT_EQ(0, T3.Copies); in TEST()
H A DSTLExtrasTest.cpp169 int Copies = 0; in TEST() local
177 EXPECT_EQ(0, Copies); in TEST()
181 EXPECT_EQ(0, Copies); in TEST()
188 int Copies = 0; in TEST() local
202 EXPECT_EQ(0, Copies); in TEST()
206 EXPECT_EQ(0, Copies); in TEST()
214 int Copies = 0; in TEST() local
230 EXPECT_EQ(0, Copies); in TEST()
852 int Copies = 0; in TEST() local
868 int Copies = 0; in TEST() local
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/llvm-project-15.0.7/libcxx/benchmarks/algorithms/
H A Dcommon.h201 TEST_ALWAYS_INLINE void resetCopies(benchmark::State& state, T& Copies, in resetCopies() argument
204 for (auto& Copy : Copies) in resetCopies()
217 auto Copies = makeOrderedValues<ValueType>(Quantity, O); in runOpOnCopies() local
218 auto Orig = Copies; in runOpOnCopies()
221 ? Copies.size() * Quantity in runOpOnCopies()
222 : Copies.size(); in runOpOnCopies()
224 for (auto& Copy : Copies) { in runOpOnCopies()
229 Copies = Orig; in runOpOnCopies()
/llvm-project-15.0.7/llvm/lib/CodeGen/
H A DMachineCopyPropagation.cpp122 if (CI != Copies.end()) in markRegsUnavailable()
137 auto I = Copies.find(*RUI); in invalidateRegister()
138 if (I != Copies.end()) { in invalidateRegister()
154 Copies.erase(*RUI); in invalidateRegister()
161 auto I = Copies.find(*RUI); in clobberRegister()
162 if (I != Copies.end()) { in clobberRegister()
175 Copies.erase(I); in clobberRegister()
204 return !Copies.empty(); in hasAnyCopies()
211 if (CI == Copies.end()) in findCopyForUnit()
221 if (CI == Copies.end()) in findCopyDefViaUnit()
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H A DTailDuplicator.cpp166 SmallVector<MachineInstr *, 16> Copies; in tailDuplicateAndUpdate() local
168 TDBBs, Copies, CandidatePtr)) in tailDuplicateAndUpdate()
244 for (unsigned i = 0, e = Copies.size(); i != e; ++i) { in tailDuplicateAndUpdate()
245 MachineInstr *Copy = Copies[i]; in tailDuplicateAndUpdate()
350 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies, in processPHI() argument
720 SmallVectorImpl<MachineInstr *> &Copies) { in duplicateSimpleBB() argument
883 appendCopies(PredBB, CopyInfos, Copies); in tailDuplicate()
951 appendCopies(PrevBB, CopyInfos, Copies); in tailDuplicate()
1017 appendCopies(PredBB, CopyInfos, Copies); in tailDuplicate()
1027 SmallVectorImpl<MachineInstr*> &Copies) { in appendCopies() argument
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H A DRegAllocGreedy.h398 unsigned Copies = 0; member
407 ZeroCostFoldedReloads || Copies); in isEmpty()
416 Copies += other.Copies; in add()
H A DMIRCanonicalizerPass.cpp294 std::vector<MachineInstr *> Copies; in propagateLocalCopies() local
297 Copies.push_back(&MI); in propagateLocalCopies()
300 for (MachineInstr *MI : Copies) { in propagateLocalCopies()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTailDuplicator.h106 SmallVectorImpl<std::pair<Register, RegSubRegPair>> &Copies,
119 SmallVectorImpl<MachineInstr *> &Copies);
124 SmallVectorImpl<MachineInstr *> &Copies,
128 SmallVectorImpl<MachineInstr *> &Copies);
/llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp379 SmallVectorImpl<SUnit*> &Copies) { in InsertCopiesAndMoveSuccs() argument
412 Copies.push_back(CopyFromSU); in InsertCopiesAndMoveSuccs()
413 Copies.push_back(CopyToSU); in InsertCopiesAndMoveSuccs()
610 SmallVector<SUnit*, 2> Copies; in ListScheduleBottomUp() local
611 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in ListScheduleBottomUp()
613 << " to SU #" << Copies.front()->NodeNum << "\n"); in ListScheduleBottomUp()
614 AddPred(TrySU, SDep(Copies.front(), SDep::Artificial)); in ListScheduleBottomUp()
615 NewDef = Copies.back(); in ListScheduleBottomUp()
H A DScheduleDAGRRList.cpp1225 SmallVectorImpl<SUnit*> &Copies) { in InsertCopiesAndMoveSuccs() argument
1267 Copies.push_back(CopyFromSU); in InsertCopiesAndMoveSuccs()
1268 Copies.push_back(CopyToSU); in InsertCopiesAndMoveSuccs()
1589 SmallVector<SUnit*, 2> Copies; in PickNodeToScheduleBottomUp() local
1590 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies); in PickNodeToScheduleBottomUp()
1592 << " to SU #" << Copies.front()->NodeNum << "\n"); in PickNodeToScheduleBottomUp()
1593 AddPredQueued(TrySU, SDep(Copies.front(), SDep::Artificial)); in PickNodeToScheduleBottomUp()
1594 NewDef = Copies.back(); in PickNodeToScheduleBottomUp()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp966 DenseMap<unsigned, V2SCopyInfo> Copies; in lowerVGPR2SGPRCopies() local
987 auto InfoIt = Copies.find(J); in lowerVGPR2SGPRCopies()
988 if (InfoIt != Copies.end()) { in lowerVGPR2SGPRCopies()
1087 Copies[In.ID] = In; in lowerVGPR2SGPRCopies()
1092 for (auto &C : Copies) { in lowerVGPR2SGPRCopies()
1099 auto CurInfoIt = Copies.find(CurID); in lowerVGPR2SGPRCopies()
1100 if (CurInfoIt != Copies.end()) { in lowerVGPR2SGPRCopies()
1104 auto SibInfoIt = Copies.find(S); in lowerVGPR2SGPRCopies()
1105 if (SibInfoIt != Copies.end()) { in lowerVGPR2SGPRCopies()
1118 Copies.erase(C.ID); in lowerVGPR2SGPRCopies()
[all …]
/llvm-project-15.0.7/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp65 Copies.push_back(SA.Id); in recordCopy()
106 for (NodeId I : Copies) { in run()
133 for (NodeId C : Copies) { in run()
H A DRDFCopy.h50 std::vector<NodeId> Copies; member
/llvm-project-15.0.7/llvm/test/CodeGen/WebAssembly/
H A Dtable-copy.ll25 ; Copies len items from table1 at src to table1 at src+off
/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DMVETPAndVPTOptimisationsPass.cpp360 SmallVector<MachineInstr *, 4> Copies; in MergeLoopEnd() local
361 auto CheckUsers = [&Copies](Register BaseReg, in MergeLoopEnd()
377 Copies.push_back(&MI); in MergeLoopEnd()
429 for (auto *MI : Copies) in MergeLoopEnd()
/llvm-project-15.0.7/llvm/docs/GlobalISel/
H A DRegBankSelect.rst32 * **Cross-Bank Copies**: ``copyCost`` --- the cost of a ``COPY`` from one bank
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86FlagsCopyLowering.cpp383 SmallVector<MachineInstr *, 4> Copies; in runOnMachineFunction() local
389 Copies.push_back(&MI); in runOnMachineFunction()
391 for (MachineInstr *CopyI : Copies) { in runOnMachineFunction()

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