| /llvm-project-15.0.7/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.h | 100 int64_t &CmpValue) const override;
106 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | LanaiInstrInfo.cpp | 179 int64_t &CmpValue) const { in analyzeCompare()
188 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
194 CmpValue = 0; in analyzeCompare()
285 int64_t /*CmpMask*/, int64_t CmpValue, in optimizeCompareInstr() argument
308 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
331 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &*I)) { in optimizeCompareInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.h | 245 int64_t &CmpValue) const override;
249 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
361 int CmpValue, const MachineRegisterInfo &MRI) const;
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| H A D | AArch64InstrInfo.cpp | 1124 CmpValue = 0; in analyzeCompare()
1142 CmpValue = 0; in analyzeCompare()
1151 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
1160 CmpValue = AArch64_AM::decodeLogicalImmediate( in analyzeCompare()
1424 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
1461 return (CmpValue == 0 || CmpValue == 1) && in optimizeCompareInstr()
1717 assert((CmpValue == 0 || CmpValue == 1) && in canCmpInstrBeRemoved()
1744 if (CmpValue && !IsSubsRegImm) in canCmpInstrBeRemoved()
1765 if (MIUsedNZCV.N && !CmpValue) in canCmpInstrBeRemoved()
1776 (!CmpValue && MICC == AArch64CC::NE); in canCmpInstrBeRemoved()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.h | 520 int64_t &CmpValue) const override;
526 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | X86InstrInfo.cpp | 3946 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
3948 CmpMask = CmpValue = 0; in analyzeCompare()
3959 CmpValue = 0; in analyzeCompare()
3968 CmpValue = 0; in analyzeCompare()
3981 CmpValue = MI.getOperand(2).getImm(); in analyzeCompare()
3983 CmpMask = CmpValue = 0; in analyzeCompare()
3993 CmpValue = 0; in analyzeCompare()
4005 CmpValue = 0; in analyzeCompare()
4314 bool IsCmpZero = (CmpMask != 0 && CmpValue == 0); in optimizeCompareInstr()
4517 if (ImmDelta != 1 || CmpValue == 0) in optimizeCompareInstr()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.h | 292 int64_t &CmpValue) const override;
299 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | ARMBaseInstrInfo.cpp | 2799 int64_t &CmpValue) const { in analyzeCompare()
2808 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
2816 CmpValue = 0; in analyzeCompare()
2823 CmpValue = 0; in analyzeCompare()
3007 int64_t CmpValue, const MachineRegisterInfo *MRI) const { in optimizeCompareInstr() argument
3048 else if (MI->getParent() != CmpInstr.getParent() || CmpValue != 0) { in optimizeCompareInstr()
3105 if (isRedundantFlagInstr(&CmpInstr, SrcReg, SrcReg2, CmpValue, &Instr, in optimizeCompareInstr()
3293 int64_t CmpMask, CmpValue; in shouldSink() local
3296 analyzeCompare(*Next, SrcReg, SrcReg2, CmpMask, CmpValue) && in shouldSink()
3297 isRedundantFlagInstr(&*Next, SrcReg, SrcReg2, CmpValue, &MI, IsThumb1)) in shouldSink()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | PeepholeOptimizer.cpp | 629 int64_t CmpMask, CmpValue; in optimizeCmpInstr() local
630 if (!TII->analyzeCompare(MI, SrcReg, SrcReg2, CmpMask, CmpValue) || in optimizeCmpInstr()
636 if (TII->optimizeCompareInstr(MI, SrcReg, SrcReg2, CmpMask, CmpValue, MRI)) { in optimizeCmpInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.h | 325 int64_t &CmpValue) const override;
328 Register SrcReg2, int64_t CmpMask, int64_t CmpValue,
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| H A D | SIInstrInfo.cpp | 8257 int64_t &CmpValue) const { in analyzeCompare()
8283 CmpValue = 0; in analyzeCompare()
8286 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
8306 CmpValue = MI.getOperand(1).getImm(); in analyzeCompare()
8316 int64_t CmpValue, in optimizeCompareInstr() argument
8321 if (SrcReg2 && !getFoldableImm(SrcReg2, *MRI, CmpValue)) in optimizeCompareInstr()
8324 const auto optimizeCmpAnd = [&CmpInstr, SrcReg, CmpValue, MRI, in optimizeCompareInstr()
8383 if (CmpValue != ExpectedValue) { in optimizeCompareInstr()
8386 IsReversedCC = CmpValue == (ExpectedValue ^ Mask); in optimizeCompareInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/Hexagon/ |
| H A D | HexagonHardwareLoops.cpp | 1452 int64_t CmpMask = 0, CmpValue = 0; in loopCountMayWrapOrUnderFlow() local
1454 if (!TII->analyzeCompare(*MI, CmpReg1, CmpReg2, CmpMask, CmpValue)) in loopCountMayWrapOrUnderFlow()
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