1109                                       int64_t &CmpValue) const {  in analyzeCompare()
1124     CmpValue = 0;  in analyzeCompare()
1142     CmpValue = 0;  in analyzeCompare()
1151     CmpValue = MI.getOperand(2).getImm();  in analyzeCompare()
1160     CmpValue = AArch64_AM::decodeLogicalImmediate(  in analyzeCompare()
1424     int64_t CmpValue, const MachineRegisterInfo *MRI) const {  in optimizeCompareInstr()  argument
1459   if (CmpValue == 0 && substituteCmpToZero(CmpInstr, SrcReg, *MRI))  in optimizeCompareInstr()
1461   return (CmpValue == 0 || CmpValue == 1) &&  in optimizeCompareInstr()
1462          removeCmpToZeroOrOne(CmpInstr, SrcReg, CmpValue, *MRI);  in optimizeCompareInstr()
1714                                  int CmpValue, const TargetRegisterInfo &TRI,  in canCmpInstrBeRemoved()  argument
1717   assert((CmpValue == 0 || CmpValue == 1) &&  in canCmpInstrBeRemoved()
1744   if (CmpValue && !IsSubsRegImm)  in canCmpInstrBeRemoved()
1746   if (!CmpValue && !IsSubsRegImm && !isADDSRegImm(CmpOpcode))  in canCmpInstrBeRemoved()
1765   if (MIUsedNZCV.N && !CmpValue)  in canCmpInstrBeRemoved()
1775   IsInvertCC = (CmpValue && (MICC == AArch64CC::EQ || MICC == AArch64CC::PL)) ||  in canCmpInstrBeRemoved()
1776                (!CmpValue && MICC == AArch64CC::NE);  in canCmpInstrBeRemoved()
1808     MachineInstr &CmpInstr, unsigned SrcReg, int CmpValue,  in removeCmpToZeroOrOne()  argument
1816   if (!canCmpInstrBeRemoved(*MI, CmpInstr, CmpValue, TRI, CCUseInstrs,  in removeCmpToZeroOrOne()