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Searched refs:CmpVal (Results 1 – 15 of 15) sorted by relevance

/llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp799 Register OldValRes, Register SuccessRes, Register Addr, Register CmpVal, in buildAtomicCmpXchgWithSuccess() argument
805 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchgWithSuccess()
820 .addUse(CmpVal) in buildAtomicCmpXchgWithSuccess()
827 Register CmpVal, Register NewVal, in buildAtomicCmpXchg() argument
832 LLT CmpValTy = getMRI()->getType(CmpVal); in buildAtomicCmpXchg()
845 .addUse(CmpVal) in buildAtomicCmpXchg()
H A DLegalizerHelper.cpp3351 Register CmpVal = MI.getOperand(3).getReg(); in lower() local
3353 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal, in lower()
3355 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal); in lower()
/llvm-project-15.0.7/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp2547 if (CmpVal == 0) { in getTestUnderMaskCond()
2553 if (EffectivelyUnsigned && CmpVal > 0 && CmpVal <= Low) { in getTestUnderMaskCond()
2567 if (CmpVal == Mask) { in getTestUnderMaskCond()
2573 if (EffectivelyUnsigned && CmpVal >= Mask - Low && CmpVal < Mask) { in getTestUnderMaskCond()
2579 if (EffectivelyUnsigned && CmpVal > Mask - Low && CmpVal <= Mask) { in getTestUnderMaskCond()
2587 if (EffectivelyUnsigned && CmpVal >= Mask - High && CmpVal < High) { in getTestUnderMaskCond()
2593 if (EffectivelyUnsigned && CmpVal > Mask - High && CmpVal <= High) { in getTestUnderMaskCond()
2652 CmpVal += 1; in adjustForTestUnderMask()
2657 MaskVal = -(CmpVal & -CmpVal); in adjustForTestUnderMask()
2671 ((CmpVal >> ShiftVal) << ShiftVal) == CmpVal && in adjustForTestUnderMask()
[all …]
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/
H A DMachineIRBuilder.h1193 Register Addr, Register CmpVal, Register NewVal,
1211 Register CmpVal, Register NewVal,
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.h544 Value *AlignedAddr, Value *CmpVal,
H A DRISCVISelLowering.cpp12187 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
12192 CmpVal = Builder.CreateSExt(CmpVal, Builder.getInt64Ty()); in emitMaskedAtomicCmpXchgIntrinsic()
12201 MaskedCmpXchg, {AlignedAddr, CmpVal, NewVal, Mask, Ordering}); in emitMaskedAtomicCmpXchgIntrinsic()
/llvm-project-15.0.7/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp2733 Register CmpVal = MI.getOperand(2).getReg(); in legalizeAtomicCmpXChg() local
2739 LLT ValTy = MRI.getType(CmpVal); in legalizeAtomicCmpXChg()
2742 Register PackedVal = B.buildBuildVector(VecTy, { NewVal, CmpVal }).getReg(0); in legalizeAtomicCmpXChg()
4697 Register CmpVal; in legalizeBufferAtomic() local
4700 CmpVal = MI.getOperand(3 + OpOffset).getReg(); in legalizeBufferAtomic()
4735 MIB.addReg(CmpVal); in legalizeBufferAtomic()
/llvm-project-15.0.7/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h928 Value *AlignedAddr, Value *CmpVal,
H A DPPCISelLowering.cpp18171 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
18174 Type *ValTy = CmpVal->getType(); in emitMaskedAtomicCmpXchgIntrinsic()
18179 Value *CmpLo = Builder.CreateTrunc(CmpVal, Int64Ty, "cmp_lo"); in emitMaskedAtomicCmpXchgIntrinsic()
18181 Builder.CreateTrunc(Builder.CreateLShr(CmpVal, 64), Int64Ty, "cmp_hi"); in emitMaskedAtomicCmpXchgIntrinsic()
/llvm-project-15.0.7/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp449 double CmpVal = IsUnsigned ? -(double)Limit * 2.0 : -(double)Limit; in LowerFPToInt() local
490 .addFPImm(cast<ConstantFP>(ConstantFP::get(Ty, CmpVal))); in LowerFPToInt()
/llvm-project-15.0.7/llvm/lib/Transforms/Instrumentation/
H A DAddressSanitizer.cpp1606 Value *CmpVal = Constant::getNullValue(ShadowTy); in instrumentAddress() local
1610 Value *Cmp = IRB.CreateICmpNE(ShadowValue, CmpVal); in instrumentAddress()
/llvm-project-15.0.7/llvm/include/llvm/CodeGen/
H A DTargetLowering.h1985 Value *CmpVal, Value *NewVal, Value *Mask, AtomicOrdering Ord) const { in emitMaskedAtomicCmpXchgIntrinsic() argument
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp1914 Register CmpVal = MI.getOperand(2).getReg(); in emitAtomicCmpSwapPartword() local
1992 .addReg(CmpVal).addImm(MaskImm); in emitAtomicCmpSwapPartword()
/llvm-project-15.0.7/llvm/lib/Transforms/InstCombine/
H A DInstCombineCompares.cpp4703 APInt CmpVal = APInt::getOneBitSet(TypeBits, ShAmt); in foldICmpEquality() local
4704 return new ICmpInst(NewPred, Xor, ConstantInt::get(A->getType(), CmpVal)); in foldICmpEquality()
/llvm-project-15.0.7/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6023 static bool isUndefOrEqual(int Val, int CmpVal) { in isUndefOrEqual() argument
6024 return ((Val == SM_SentinelUndef) || (Val == CmpVal)); in isUndefOrEqual()
6029 static bool isUndefOrEqual(ArrayRef<int> Mask, int CmpVal) { in isUndefOrEqual() argument
6030 return llvm::all_of(Mask, [CmpVal](int M) { in isUndefOrEqual()
6031 return (M == SM_SentinelUndef) || (M == CmpVal); in isUndefOrEqual()
45546 const APInt &CmpVal = CmpConstant->getAPIntValue(); in combineSetCCMOVMSK() local
45550 assert(CmpBits == CmpVal.getBitWidth() && "Value size mismatch"); in combineSetCCMOVMSK()
45567 bool IsAnyOf = CmpOpcode == X86ISD::CMP && CmpVal.isZero(); in combineSetCCMOVMSK()
45569 NumElts <= CmpBits && CmpVal.isMask(NumElts); in combineSetCCMOVMSK()