| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | IfConversion.cpp | 894 if (TrueBBI.BrCond.size() == 0 || in ValidForkedDiamond()
895 FalseBBI.BrCond.size() == 0) in ValidForkedDiamond()
1027 BBI.BrCond.clear(); in AnalyzeBranches()
1033 BBI.BrCond.clear(); in AnalyzeBranches()
1036 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBranches()
1041 if (BBI.BrCond.size()) { in AnalyzeBranches()
1194 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
1284 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock()
1538 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertSimple()
1624 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertTriangle()
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| H A D | MachinePipeliner.cpp | 343 LI.BrCond.clear(); in canPipelineLoop()
344 if (TII->analyzeBranch(*L.getHeader(), LI.TBB, LI.FBB, LI.BrCond)) { in canPipelineLoop()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.h | 216 bool matchOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
217 void applyOptBrCondByInvertingCond(MachineInstr &MI, MachineInstr *&BrCond);
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| /llvm-project-15.0.7/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 1210 BrCond = &*std::prev(BrIt); in matchOptBrCondByInvertingCond()
1211 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1216 MachineBasicBlock *BrCondTarget = BrCond->getOperand(1).getMBB(); in matchOptBrCondByInvertingCond()
1224 Builder.setInstrAndDebugLoc(*BrCond); in applyOptBrCondByInvertingCond()
1225 LLT Ty = MRI.getType(BrCond->getOperand(0).getReg()); in applyOptBrCondByInvertingCond()
1231 auto Xor = Builder.buildXor(Ty, BrCond->getOperand(0), True); in applyOptBrCondByInvertingCond()
1233 auto *FallthroughBB = BrCond->getOperand(1).getMBB(); in applyOptBrCondByInvertingCond()
1240 Observer.changingInstr(*BrCond); in applyOptBrCondByInvertingCond()
1241 BrCond->getOperand(0).setReg(Xor.getReg(0)); in applyOptBrCondByInvertingCond()
1242 BrCond->getOperand(1).setMBB(BrTarget); in applyOptBrCondByInvertingCond()
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| H A D | IRTranslator.cpp | 806 auto BrCond = MIB.buildBrCond(Cmp.getReg(0), *JT.Default); in emitJumpTableHeader() local
810 BrCond = MIB.buildBr(*JT.MBB); in emitJumpTableHeader()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | MachinePipeliner.h | 84 SmallVector<MachineOperand, 4> BrCond; member
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 5561 if (MachineInstr *BrCond = in legalizeIntrinsic() local
5569 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
5574 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
5599 BrCond->eraseFromParent(); in legalizeIntrinsic()
5609 if (MachineInstr *BrCond = in legalizeIntrinsic() local
5614 MachineBasicBlock *CondBrTarget = BrCond->getOperand(1).getMBB(); in legalizeIntrinsic()
5620 B.setInsertPt(B.getMBB(), BrCond->getIterator()); in legalizeIntrinsic()
5631 BrCond->eraseFromParent(); in legalizeIntrinsic()
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGBuilder.cpp | 2535 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSwitchCase() local
2542 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitSwitchCase()
2545 DAG.setRoot(BrCond); in visitSwitchCase()
2598 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitJumpTableHeader() local
2604 BrCond = DAG.getNode(ISD::BR, dl, MVT::Other, BrCond, in visitJumpTableHeader()
2607 DAG.setRoot(BrCond); in visitJumpTableHeader()
2723 SDValue BrCond = DAG.getNode(ISD::BRCOND, dl, in visitSPDescriptorParent() local
2728 MVT::Other, BrCond, in visitSPDescriptorParent()
10801 SDValue BrCond = in lowerWorkItem() local
10805 BrCond = DAG.getNode(ISD::BR, DL, MVT::Other, BrCond, in lowerWorkItem()
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| /llvm-project-15.0.7/llvm/lib/Transforms/Utils/ |
| H A D | SimplifyCFG.cpp | 2733 Value *BrCond = BI->getCondition(); in SpeculativelyExecuteBB() local
2734 if (isa<FCmpInst>(BrCond)) in SpeculativelyExecuteBB()
2865 BrCond, TrueV, FalseV, "spec.store.select", BI); in SpeculativelyExecuteBB()
2905 Value *V = Builder.CreateSelect(BrCond, TrueV, FalseV, "spec.select", BI); in SpeculativelyExecuteBB()
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