| /llvm-project-15.0.7/llvm/include/llvm/Bitstream/ |
| H A D | BitstreamWriter.h | 134 void BackpatchWord(uint64_t BitNo, unsigned NewWord) { in BackpatchWord() argument
136 uint64_t ByteNo = BitNo / 8; in BackpatchWord()
137 uint64_t StartBit = BitNo & 7; in BackpatchWord()
192 void BackpatchWord64(uint64_t BitNo, uint64_t Val) { in BackpatchWord64() argument
193 BackpatchWord(BitNo, (uint32_t)Val); in BackpatchWord64()
194 BackpatchWord(BitNo + 32, (uint32_t)(Val >> 32)); in BackpatchWord64()
315 uint64_t BitNo = uint64_t(B.StartSizeWord) * 32; in ExitBlock() local
318 BackpatchWord(BitNo, SizeInWords); in ExitBlock()
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| H A D | BitstreamReader.h | 127 Error JumpToBit(uint64_t BitNo) { in JumpToBit() argument
128 size_t ByteNo = size_t(BitNo/8) & ~(sizeof(word_t)-1); in JumpToBit()
129 unsigned WordBitNo = unsigned(BitNo & (sizeof(word_t)*8-1)); in JumpToBit()
155 const uint8_t *getPointerToBit(uint64_t BitNo, uint64_t NumBytes) { in getPointerToBit() argument
156 assert(!(BitNo % 8) && "Expected bit on byte boundary"); in getPointerToBit()
157 return getPointerToByte(BitNo / 8, NumBytes); in getPointerToBit()
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| /llvm-project-15.0.7/llvm/utils/TableGen/ |
| H A D | DecoderEmitter.cpp | 1092 unsigned Num, BitNo; in getIslands() local
1093 Num = BitNo = 0; in getIslands()
1113 BitNo = 0; in getIslands()
1126 ++BitNo; in getIslands()
1127 FieldVal = FieldVal | Val << BitNo; in getIslands()
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| /llvm-project-15.0.7/llvm/include/llvm/ADT/ |
| H A D | APInt.h | 222 static APInt getOneBitSet(unsigned numBits, unsigned BitNo) { in getOneBitSet() argument
224 Res.setBit(BitNo); in getOneBitSet()
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| /llvm-project-15.0.7/llvm/lib/Target/M68k/ |
| H A D | M68kISelLowering.cpp | 1423 static SDValue getBitTestCondition(SDValue Src, SDValue BitNo, ISD::CondCode CC, in getBitTestCondition() argument
1433 if (Src.getValueType() != BitNo.getValueType()) in getBitTestCondition()
1434 BitNo = DAG.getNode(ISD::ANY_EXTEND, DL, Src.getValueType(), BitNo); in getBitTestCondition()
1436 SDValue BTST = DAG.getNode(M68kISD::BTST, DL, MVT::i32, Src, BitNo); in getBitTestCondition()
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| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 8376 unsigned BitNo = countTrailingZeros((uint64_t)Mask); in optimizeCompareInstr() local
8377 if (IsSigned && BitNo == SrcSize - 1) in optimizeCompareInstr()
8380 ExpectedValue <<= BitNo; in optimizeCompareInstr()
8421 .addImm(BitNo); in optimizeCompareInstr()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23353 DAG.MaskedValueIsZero(BitNo, APInt(BitNo.getValueSizeInBits(), 32))) in getBT()
23358 if (Src.getValueType() != BitNo.getValueType()) { in getBT()
23362 if (BitNo.getOpcode() == ISD::AND && BitNo->hasOneUse()) in getBT()
23369 BitNo = DAG.getNode(ISD::ANY_EXTEND, DL, Src.getValueType(), BitNo); in getBT()
24013 SDValue Src, BitNo; in LowerAndToBT() local
24028 BitNo = Op0.getOperand(1); in LowerAndToBT()
24037 BitNo = AndLHS.getOperand(1); in LowerAndToBT()
24062 if (SDValue BT = getBT(Src, BitNo, dl, DAG)) { in LowerAndToBT()
45375 BitNo = Carry.getOperand(1); in combineCarryThroughADD()
45378 return getBT(Carry, BitNo, DL, DAG); in combineCarryThroughADD()
[all …]
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 10643 unsigned BitNo; // Bit # of CR6. in LowerINTRINSIC_WO_CHAIN() local
10648 BitNo = 0; InvertBit = false; in LowerINTRINSIC_WO_CHAIN()
10651 BitNo = 0; InvertBit = true; in LowerINTRINSIC_WO_CHAIN()
10654 BitNo = 2; InvertBit = false; in LowerINTRINSIC_WO_CHAIN()
10657 BitNo = 2; InvertBit = true; in LowerINTRINSIC_WO_CHAIN()
10663 DAG.getConstant(8 - (3 - BitNo), dl, MVT::i32)); in LowerINTRINSIC_WO_CHAIN()
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