Searched refs:BasePtrReg (Results 1 – 3 of 3) sorted by relevance
| /llvm-project-15.0.7/llvm/lib/Target/AMDGPU/ |
| H A D | SIFrameLowering.cpp | 760 Register BasePtrReg = in emitPrologue() local 858 SaveSGPRToMemory(BasePtrReg, *BPSaveIndex); in emitPrologue() 860 SaveSGPRToVGPRLane(BasePtrReg, *BPSaveIndex); in emitPrologue() 867 .addReg(BasePtrReg) in emitPrologue() 926 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitPrologue() 980 const Register BasePtrReg = in emitEpilogue() local 1001 BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::COPY), BasePtrReg) in emitEpilogue() 1041 RestoreSGPRFromMemory(BasePtrReg, BasePtrFI); in emitEpilogue() 1043 RestoreSGPRFromVGPRLane(BasePtrReg, BasePtrFI); in emitEpilogue() 1360 Register BasePtrReg = RI->getBaseRegister(); in assignCalleeSavedSpillSlots() local [all …]
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| H A D | SIRegisterInfo.cpp | 644 MCRegister BasePtrReg = getBaseRegister(); in getReservedRegs() local 645 reserveRegisterTuples(Reserved, BasePtrReg); in getReservedRegs() 646 assert(!isSubRegister(ScratchRSrcReg, BasePtrReg)); in getReservedRegs()
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| H A D | AMDGPURegisterBankInfo.cpp | 1139 Register BasePtrReg = SrcRegs[0]; in applyMappingLoad() local 1141 MRI.setType(BasePtrReg, PtrTy); in applyMappingLoad()
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