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/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/
H A Dselect-optimize-multiple.mir59 ; RV32I-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
68 ; RV32I-NEXT: BNE [[ANDI]], [[COPY4]], %bb.4
87 ; RV32IBT-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
96 ; RV32IBT-NEXT: BNE [[ANDI]], [[COPY4]], %bb.4
115 ; RV64I-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
124 ; RV64I-NEXT: BNE [[ANDI]], [[COPY4]], %bb.4
143 ; RV64IBT-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
152 ; RV64IBT-NEXT: BNE [[ANDI]], [[COPY4]], %bb.4
215 ; RV32I-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
239 ; RV32IBT-NEXT: BNE [[ANDI]], [[COPY4]], %bb.2
[all …]
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
H A Dphi.mir82 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
101 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
157 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
182 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
239 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
258 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
310 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
330 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
H A Djump_table_and_brjt.mir89 ; MIPS32: BNE [[ANDi]], $zero, %bb.6, implicit-def $at
117 ; MIPS32: BNE [[ANDi1]], $zero, %bb.13, implicit-def $at
156 ; MIPS32_PIC: BNE [[ANDi]], $zero, %bb.6, implicit-def $at
185 ; MIPS32_PIC: BNE [[ANDi1]], $zero, %bb.13, implicit-def $at
H A Dbranch.mir75 ; MIPS32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/
H A D2011-05-26-BranchKillsVreg.ll5 ; This requires updating the BNE-J terminators to a BEQ. The BNE instruction
H A Ddelay-slot-filler-bundled-insts-def-use.mir74 ; CHECK: BNE killed renamable $at, $zero, %bb.2, implicit-def $at {
96 BNE killed renamable $at, $zero, %bb.1, implicit-def $at
/llvm-project-15.0.7/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp250 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
335 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doMaskedAtomicBinOpExpansion()
494 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicMinMaxOp()
549 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
559 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
574 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
590 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
H A DRISCVRedundantCopyElimination.cpp77 if (Opc == RISCV::BNE && MI.getOperand(1).getReg() == RISCV::X0 && in guaranteesZeroRegInBlock()
H A DRISCVInstrInfo.cpp749 case RISCV::BNE: in getCondFromBranchOpc()
784 return get(RISCV::BNE); in getBrCond()
1017 case RISCV::BNE: in isBranchOffsetInRange()
H A DRISCVInstrInfo.td608 def BNE : BranchCC_rri<0b001, "bne">;
881 (BNE GPR:$rs, X0, simm13_lsb0:$offset)>;
1320 def : BccPat<SETNE, BNE>;
H A DRISCVInstrInfoC.td848 def : CompressPat<(BNE GPRC:$rs1, X0, simm9_lsb0:$imm),
/llvm-project-15.0.7/llvm/lib/Target/Mips/
H A DMipsExpandPseudo.cpp85 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword() local
93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword()
213 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local
219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
228 BNE = Mips::BNE; in expandAtomicCmpSwap()
238 BNE = Mips::BNE64; in expandAtomicCmpSwap()
279 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwap()
H A DMipsInstrInfo.cpp316 case Mips::BNE: case Mips::BNE64: in isBranchOffsetInRange()
458 case Mips::BNE: in getEquivalentCompactForm()
500 case Mips::BNE: in getEquivalentCompactForm()
H A DMipsSEInstrInfo.cpp505 case Mips::BEQ: return Mips::BNE; in getOppositeBranchOpc()
507 case Mips::BNE: return Mips::BEQ; in getOppositeBranchOpc()
660 return (Opc == Mips::BEQ || Opc == Mips::BEQ_MM || Opc == Mips::BNE || in getAnalyzableBrOpc()
H A DMipsInstructionSelector.cpp361 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::BNE)) in select()
H A DMipsScheduleP5600.td74 BLTZAL, BLTZALL, BLTZL, BNE, BNEL, BREAK,
H A DMipsInstrInfo.td2228 def BNE : MMRel, CBranch<"bne", brtarget, setne, GPR32Opnd>, BEQ_FM<5>,
2836 (BNE GPR32Opnd:$rs, ZERO, brtarget:$offset), 0>,
3281 defm : BrcondPats<GPR32, BEQ, BEQ, BNE, SLT, SLTu, SLTi, SLTiu, ZERO>,
/llvm-project-15.0.7/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.cpp184 Res.setOpcode(RISCV::BNE); in relaxInstruction()
343 return RISCV::BNE; in getRelaxedOpcode()
/llvm-project-15.0.7/llvm/test/CodeGen/Mips/longbranch/
H A Dbranch-limits-int.mir114 ; MIPS: BNE $at, $zero, %bb.2, implicit-def $at {
133 ; PIC: BNE $at, $zero, %bb.3, implicit-def $at {
658 BNE killed renamable $at, $zero, %bb.2, implicit-def $at
/llvm-project-15.0.7/llvm/test/CodeGen/RISCV/rvv/
H A Dwrong-stack-offset-for-rvv-object.mir179 ; CHECK-NEXT: BNE $x0, $x0, %bb.1
209 BNE $x0, $x0, %bb.1
H A Dvsetvli-insert-crossbb.mir776 ; CHECK-NEXT: BNE [[ADDI]], [[COPY4]], %bb.1
810 BNE %4, %18, %bb.1
/llvm-project-15.0.7/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsInstPrinter.cpp282 case Mips::BNE: in printAlias()
/llvm-project-15.0.7/llvm/test/CodeGen/LoongArch/
H A D2ri.mir396 BNE $r4, $r5, 76
/llvm-project-15.0.7/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp1896 case Mips::BNE: in processInstruction()
3629 OpCode = Mips::BNE; in expandBranchImm()
4055 TOut.emitRRX(Mips::BNE, Mips::ZERO, Mips::ZERO, in expandCondBranches()
4105 TOut.emitRRX(AcceptsEquality ? Mips::BEQ : Mips::BNE, in expandCondBranches()
4148 : (AcceptsEquality ? Mips::BEQ : Mips::BNE), in expandCondBranches()
4279 TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI); in expandDivRem()
4310 TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI); in expandDivRem()
4323 TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI); in expandDivRem()
/llvm-project-15.0.7/llvm/lib/Target/LoongArch/
H A DLoongArchInstrInfo.td367 def BNE : BrCC_2RI16<0b010111, "bne">;
737 def : BccPat<setne, BNE>;

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