| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | Instruction.cpp | 390 case AtomicRMW: return "atomicrmw"; in getOpcodeName()
583 case Instruction::AtomicRMW: in mayReadFromMemory()
603 case Instruction::AtomicRMW: in mayWriteToMemory()
621 case Instruction::AtomicRMW: in isAtomic()
637 case Instruction::AtomicRMW: in hasAtomicLoad()
649 case Instruction::AtomicRMW: in hasAtomicStore()
659 case Instruction::AtomicRMW: in isVolatile()
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| H A D | Instructions.cpp | 1655 : Instruction(Val->getType(), AtomicRMW, in AtomicRMWInst()
1664 : Instruction(Val->getType(), AtomicRMW, in AtomicRMWInst()
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| /llvm-project-15.0.7/compiler-rt/lib/tsan/rtl-old/ |
| H A D | tsan_interface_atomic.cpp | 284 static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) { in AtomicRMW() function
340 return AtomicRMW<T, func_xchg>(thr, pc, a, v, mo); in AtomicExchange()
346 return AtomicRMW<T, func_add>(thr, pc, a, v, mo); in AtomicFetchAdd()
352 return AtomicRMW<T, func_sub>(thr, pc, a, v, mo); in AtomicFetchSub()
358 return AtomicRMW<T, func_and>(thr, pc, a, v, mo); in AtomicFetchAnd()
364 return AtomicRMW<T, func_or>(thr, pc, a, v, mo); in AtomicFetchOr()
370 return AtomicRMW<T, func_xor>(thr, pc, a, v, mo); in AtomicFetchXor()
376 return AtomicRMW<T, func_nand>(thr, pc, a, v, mo); in AtomicFetchNand()
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| /llvm-project-15.0.7/compiler-rt/lib/tsan/rtl/ |
| H A D | tsan_interface_atomic.cpp | 285 static T AtomicRMW(ThreadState *thr, uptr pc, volatile T *a, T v, morder mo) { in AtomicRMW() function
344 return AtomicRMW<T, func_xchg>(thr, pc, a, v, mo); in AtomicExchange()
350 return AtomicRMW<T, func_add>(thr, pc, a, v, mo); in AtomicFetchAdd()
356 return AtomicRMW<T, func_sub>(thr, pc, a, v, mo); in AtomicFetchSub()
362 return AtomicRMW<T, func_and>(thr, pc, a, v, mo); in AtomicFetchAnd()
368 return AtomicRMW<T, func_or>(thr, pc, a, v, mo); in AtomicFetchOr()
374 return AtomicRMW<T, func_xor>(thr, pc, a, v, mo); in AtomicFetchXor()
380 return AtomicRMW<T, func_nand>(thr, pc, a, v, mo); in AtomicFetchNand()
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| /llvm-project-15.0.7/llvm/unittests/Analysis/ |
| H A D | AliasAnalysisTest.cpp | 187 auto *AtomicRMW = new AtomicRMWInst( in TEST_F() local
206 EXPECT_EQ(AA.getModRefInfo(AtomicRMW, MemoryLocation()), ModRefInfo::ModRef); in TEST_F()
207 EXPECT_EQ(AA.getModRefInfo(AtomicRMW, None), ModRefInfo::ModRef); in TEST_F()
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| /llvm-project-15.0.7/llvm/lib/Analysis/ |
| H A D | MemoryLocation.cpp | 86 case Instruction::AtomicRMW: in getOrNone()
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| H A D | CaptureTracking.cpp | 372 case Instruction::AtomicRMW: { in DetermineUseCaptureKind()
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| H A D | AliasAnalysis.cpp | 695 case Instruction::AtomicRMW: in getModRefInfo()
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| H A D | ValueTracking.cpp | 4786 case Instruction::AtomicRMW: in isSafeToSpeculativelyExecuteWithOpcode()
5563 case Instruction::AtomicRMW: in getGuaranteedWellDefinedOps()
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | Instruction.def | 177 HANDLE_MEMORY_INST(37, AtomicRMW , AtomicRMWInst )
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| H A D | Instructions.h | 884 return I->getOpcode() == Instruction::AtomicRMW;
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| /llvm-project-15.0.7/llvm/lib/CodeGen/ |
| H A D | StackProtector.cpp | 237 case Instruction::AtomicRMW: in HasAddressTaken()
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| H A D | TargetLoweringBase.cpp | 1812 case AtomicRMW: return 0; in InstructionOpcodeToISD()
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| /llvm-project-15.0.7/llvm/test/Transforms/LoopStrengthReduce/AMDGPU/ |
| H A D | atomics.ll | 5 ; Make sure the pointer / address space of AtomicRMW is considered
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| /llvm-project-15.0.7/llvm/lib/AsmParser/ |
| H A D | LLLexer.cpp | 854 INSTKEYWORD(atomicrmw, AtomicRMW); in LexIdentifier()
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| /llvm-project-15.0.7/llvm/test/CodeGen/PowerPC/ |
| H A D | atomics.ll | 343 ; AtomicRMW
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| /llvm-project-15.0.7/llvm/bindings/ocaml/llvm/ |
| H A D | llvm.ml | 242 | AtomicRMW Constructor
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| H A D | llvm.mli | 266 | AtomicRMW Constructor
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| /llvm-project-15.0.7/llvm/test/Transforms/Attributor/ |
| H A D | undefined_behavior.ll | 176 ; -- AtomicRMW tests --
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| /llvm-project-15.0.7/llvm/lib/Transforms/Vectorize/ |
| H A D | VPlan.h | 884 case Instruction::AtomicRMW: in hasResult()
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| /llvm-project-15.0.7/llvm/lib/Transforms/IPO/ |
| H A D | AttributorAttributes.cpp | 1894 case Instruction::AtomicRMW: in isNonRelaxedAtomic()
2684 Instruction::AtomicRMW}, in updateImpl()
2728 case Instruction::AtomicRMW: in isAssumedToCauseUB()
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| H A D | Attributor.cpp | 2811 case Instruction::AtomicRMW: in initializeInformationCache()
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| /llvm-project-15.0.7/llvm/lib/Target/DirectX/DXILWriter/ |
| H A D | DXILBitcodeWriter.cpp | 2510 case Instruction::AtomicRMW: in writeInstruction()
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| /llvm-project-15.0.7/llvm/lib/Bitcode/Writer/ |
| H A D | BitcodeWriter.cpp | 3154 case Instruction::AtomicRMW: in writeInstruction()
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