| /llvm-project-15.0.7/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.td | 1047 AnyReg:$rs1, AnyReg:$rs2, 1059 AnyReg:$rs1, AnyReg:$rs2, 1069 AnyReg:$rs2, AnyReg:$rs1, 1081 AnyReg:$rs1, AnyReg:$rs2)>; 1085 AnyReg:$rs1, AnyReg:$rs2, AnyReg:$rs3)>; 1088 AnyReg:$rs1, AnyReg:$rs2, AnyReg:$rs3)>; 1090 (InsnI AnyReg:$rd, uimm7_opcode:$opcode, uimm3:$funct3, AnyReg:$rs1, 1094 AnyReg:$rs1, simm12:$imm12)>; 1097 AnyReg:$rs2, simm13_lsb0:$imm12)>; 1101 AnyReg:$rs2, simm13_lsb0:$imm12)>; [all …]
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| H A D | RISCVRegisterInfo.td | 599 def AnyReg : RegisterClass<"RISCV", [untyped], 32,
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| /llvm-project-15.0.7/llvm/include/llvm/IR/ |
| H A D | CallingConv.h | 62 AnyReg = 13, enumerator
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| /llvm-project-15.0.7/llvm/lib/Target/SystemZ/ |
| H A D | SystemZInstrInfo.td | 2226 (ins imm64zx48:$enc, AnyReg:$R1, 2231 (ins imm64zx16:$enc, AnyReg:$R1, AnyReg:$R2), 2234 AnyReg:$R1, AnyReg:$R2), 2237 (ins imm64zx32:$enc, AnyReg:$R1, AnyReg:$R2, 2238 AnyReg:$R3, imm32zx4:$M4), 2241 (ins imm64zx48:$enc, AnyReg:$R1, 2242 AnyReg:$R2, imm32zx4:$M3, 2246 (ins imm64zx32:$enc, AnyReg:$R1, 2250 (ins imm64zx48:$enc, AnyReg:$R1, 2254 (ins imm64zx48:$enc, AnyReg:$R1, [all …]
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| H A D | SystemZRegisterInfo.cpp | 203 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) in getCalleeSavedRegs() 227 if (CC == CallingConv::AnyReg) in getCallPreservedMask()
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| H A D | SystemZRegisterInfo.td | 150 defm AnyReg : SystemZRegClass<"AnyReg",
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| H A D | SystemZCallingConv.td | 152 // "All registers" as used by the AnyReg calling convention.
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| /llvm-project-15.0.7/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.td | 36 // PPC64 AnyReg return-value convention. No explicit register is specified for 72 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_PPC64_AnyReg>>, 105 // No explicit register is specified for the AnyReg calling convention. The 125 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_PPC64_AnyReg>>, 141 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_PPC64_AnyReg>>,
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| H A D | PPCRegisterInfo.cpp | 187 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) { in getCalleeSavedRegs() 269 if (CC == CallingConv::AnyReg) { in getCallPreservedMask()
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| /llvm-project-15.0.7/llvm/include/llvm/CodeGen/ |
| H A D | StackMaps.h | 97 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); } in isAnyReg()
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| /llvm-project-15.0.7/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 77 if (MF->getFunction().getCallingConv() == CallingConv::AnyReg) in getCalleeSavedRegs() 215 if (CC == CallingConv::AnyReg) in getCallPreservedMask()
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| /llvm-project-15.0.7/llvm/lib/Target/X86/ |
| H A D | X86RegisterInfo.cpp | 304 case CallingConv::AnyReg: in getCalleeSavedRegs() 427 case CallingConv::AnyReg: in getCallPreservedMask()
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| H A D | X86CallingConv.td | 422 // X86-64 AnyReg return-value convention. No explicit register is specified for 473 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<RetCC_X86_64_AnyReg>>, 754 // No explicit register is specified for the AnyReg calling convention. The 1096 CCIfCC<"CallingConv::AnyReg", CCDelegateTo<CC_X86_64_AnyReg>>,
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| /llvm-project-15.0.7/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | StatepointLowering.cpp | 1042 assert(I.getCallingConv() != CallingConv::AnyReg && in LowerStatepoint()
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| H A D | InstrEmitter.cpp | 972 unsigned CC = CallingConv::AnyReg; in EmitMachineNode()
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| H A D | FastISel.cpp | 770 bool IsAnyRegCC = CC == CallingConv::AnyReg; in selectPatchpoint()
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| H A D | SelectionDAGBuilder.cpp | 9400 bool IsAnyRegCC = CC == CallingConv::AnyReg; in visitPatchpoint()
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| /llvm-project-15.0.7/mlir/include/mlir/Dialect/LLVMIR/ |
| H A D | LLVMOps.td | 80 def CConvAnyReg : LLVM_EnumAttrCase<"AnyReg", "anyregcc", "AnyReg", 13>;
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| /llvm-project-15.0.7/llvm/lib/IR/ |
| H A D | AsmWriter.cpp | 294 case CallingConv::AnyReg: Out << "anyregcc"; break; in PrintCallingConv()
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| /llvm-project-15.0.7/llvm/lib/AsmParser/ |
| H A D | LLParser.cpp | 1939 case lltok::kw_anyregcc: CC = CallingConv::AnyReg; break; in parseOptionalCallingConv()
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