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Searched refs:ARMBaseRegisterInfo (Results 1 – 18 of 18) sorted by relevance

/llvm-project-15.0.7/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp57 ARMBaseRegisterInfo::ARMBaseRegisterInfo() in ARMBaseRegisterInfo() function in ARMBaseRegisterInfo
154 ARMBaseRegisterInfo::getNoPreservedMask() const { in getNoPreservedMask()
199 BitVector ARMBaseRegisterInfo::
235 bool ARMBaseRegisterInfo::
475 bool ARMBaseRegisterInfo::
496 void ARMBaseRegisterInfo::emitLoadConstPool( in emitLoadConstPool()
515 bool ARMBaseRegisterInfo::
520 bool ARMBaseRegisterInfo::
525 bool ARMBaseRegisterInfo::
530 int64_t ARMBaseRegisterInfo::
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H A DARMFixCortexA57AES1742098Pass.cpp105 const ARMBaseRegisterInfo *TRI,
109 const ARMBaseRegisterInfo *TRI) const;
255 const ARMBaseRegisterInfo *TRI = STI.getRegisterInfo(); in runOnMachineFunction()
277 const ARMBaseRegisterInfo *TRI, in analyzeMF()
399 const ARMBaseRegisterInfo *TRI) const { in insertAESFixup()
H A DThumbRegisterInfo.cpp46 return ARMBaseRegisterInfo::getLargestLegalSuperClass(RC, MF); in getLargestLegalSuperClass()
50 return ARMBaseRegisterInfo::getLargestLegalSuperClass(RC, MF); in getLargestLegalSuperClass()
57 return ARMBaseRegisterInfo::getPointerRegClass(MF, Kind); in getPointerRegClass()
127 const ARMBaseRegisterInfo &MRI, unsigned MIFlags = MachineInstr::NoFlags) { in emitThumbRegPlusImmInReg()
190 const ARMBaseRegisterInfo &MRI, in emitThumbRegPlusImmediate()
446 return ARMBaseRegisterInfo::resolveFrameIndex(MI, BaseReg, Offset); in resolveFrameIndex()
469 return ARMBaseRegisterInfo::eliminateFrameIndex(II, SPAdj, FIOperandNum, in eliminateFrameIndex()
H A DARMRegisterInfo.h20 struct ARMRegisterInfo : public ARMBaseRegisterInfo {
H A DARMBaseRegisterInfo.h127 class ARMBaseRegisterInfo : public ARMGenRegisterInfo {
135 explicit ARMBaseRegisterInfo();
H A DThumbRegisterInfo.h25 struct ThumbRegisterInfo : public ARMBaseRegisterInfo {
H A DCMakeLists.txt26 ARMBaseRegisterInfo.cpp
H A DARMBaseInstrInfo.h34 class ARMBaseRegisterInfo; variable
126 virtual const ARMBaseRegisterInfo &getRegisterInfo() const = 0;
812 const ARMBaseRegisterInfo &MRI,
H A DThumb1FrameLowering.cpp1100 const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>( in spillCalleeSavedRegisters()
1146 const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>( in restoreCalleeSavedRegisters()
H A DARMSubtarget.h276 const ARMBaseRegisterInfo *getRegisterInfo() const override { in getRegisterInfo()
H A DARMFrameLowering.cpp300 const ARMBaseRegisterInfo *RegInfo = Subtarget.getRegisterInfo(); in insertSEH()
714 const ARMBaseRegisterInfo *RegInfo = STI.getRegisterInfo(); in emitPrologue()
1417 const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>( in ResolveFrameIndexReference()
2167 if (!static_cast<const ARMBaseRegisterInfo *>( in checkNumAlignedDPRCS2Regs()
2252 const ARMBaseRegisterInfo *RegInfo = static_cast<const ARMBaseRegisterInfo *>( in determineCalleeSaves()
H A DARMInstructionSelector.cpp74 const ARMBaseRegisterInfo &TRI;
H A DARMFastISel.cpp2497 const ARMBaseRegisterInfo *RegInfo = in SelectIntrinsicCall()
2498 static_cast<const ARMBaseRegisterInfo *>(Subtarget->getRegisterInfo()); in SelectIntrinsicCall()
H A DARMBaseInstrInfo.cpp5802 const ARMBaseRegisterInfo *ARI = in findRegisterToSaveLRTo()
5803 static_cast<const ARMBaseRegisterInfo *>(&TRI); in findRegisterToSaveLRTo()
H A DARMISelLowering.cpp2800 const ARMBaseRegisterInfo *ARI = Subtarget->getRegisterInfo(); in LowerCall()
3024 const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo(); in IsEligibleForTailCallOptimization()
3276 const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo(); in LowerReturn()
4032 const ARMBaseRegisterInfo *ARI = Subtarget->getRegisterInfo(); in LowerINTRINSIC_VOID()
6087 const ARMBaseRegisterInfo &ARI = in LowerFRAMEADDR()
6088 *static_cast<const ARMBaseRegisterInfo*>(RegInfo); in LowerFRAMEADDR()
10784 const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); in EmitSjLjDispatchBlock()
21739 const ARMBaseRegisterInfo *TRI = Subtarget->getRegisterInfo(); in insertCopiesSplitCSR()
H A DARMExpandPseudoInsts.cpp2412 const ARMBaseRegisterInfo &RI = AII->getRegisterInfo(); in ExpandMI()
/llvm-project-15.0.7/llvm/test/CodeGen/ARM/
H A Dcrash-O0.ll18 ; ARMBaseRegisterInfo::estimateRSStackSizeLimit must return a 255 limit.
/llvm-project-15.0.7/llvm/utils/gn/secondary/llvm/lib/Target/ARM/
H A DBUILD.gn69 "ARMBaseRegisterInfo.cpp",