57 ARMBaseRegisterInfo::ARMBaseRegisterInfo()  in ARMBaseRegisterInfo()  function in ARMBaseRegisterInfo
63 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const {  in getCalleeSavedRegs()
121 const MCPhysReg *ARMBaseRegisterInfo::getCalleeSavedRegsViaCopy(  in getCalleeSavedRegsViaCopy()
131 ARMBaseRegisterInfo::getCallPreservedMask(const MachineFunction &MF,  in getCallPreservedMask()
154 ARMBaseRegisterInfo::getNoPreservedMask() const {  in getNoPreservedMask()
159 ARMBaseRegisterInfo::getTLSCallPreservedMask(const MachineFunction &MF) const {  in getTLSCallPreservedMask()
166 ARMBaseRegisterInfo::getSjLjDispatchPreservedMask(const MachineFunction &MF) const {  in getSjLjDispatchPreservedMask()
175 ARMBaseRegisterInfo::getThisReturnPreservedMask(const MachineFunction &MF,  in getThisReturnPreservedMask()
193 ArrayRef<MCPhysReg> ARMBaseRegisterInfo::getIntraCallClobberedRegs(  in getIntraCallClobberedRegs()
199 BitVector ARMBaseRegisterInfo::
235 bool ARMBaseRegisterInfo::
240 bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF,  in isInlineAsmReadOnlyReg()
256 ARMBaseRegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,  in getLargestLegalSuperClass()
286 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind)  in getPointerRegClass()
292 ARMBaseRegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {  in getCrossCopyRegClass()
299 ARMBaseRegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC,  in getRegPressureLimit()
336 bool ARMBaseRegisterInfo::getRegAllocationHints(  in getRegAllocationHints()
391 void ARMBaseRegisterInfo::updateRegAllocHint(Register Reg, Register NewReg,  in updateRegAllocHint()
416 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const {  in hasBasePointer()
453 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const {  in canRealignStack()
475 bool ARMBaseRegisterInfo::
485 ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const {  in getFrameRegister()
496 void ARMBaseRegisterInfo::emitLoadConstPool(  in emitLoadConstPool()
515 bool ARMBaseRegisterInfo::
520 bool ARMBaseRegisterInfo::
525 bool ARMBaseRegisterInfo::
530 int64_t ARMBaseRegisterInfo::
583 bool ARMBaseRegisterInfo::
665 ARMBaseRegisterInfo::materializeFrameBaseRegister(MachineBasicBlock *MBB,  in materializeFrameBaseRegister()
693 void ARMBaseRegisterInfo::resolveFrameIndex(MachineInstr &MI, Register BaseReg,  in resolveFrameIndex()
721 bool ARMBaseRegisterInfo::isFrameOffsetLegal(const MachineInstr *MI,  in isFrameOffsetLegal()
790 ARMBaseRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,  in eliminateFrameIndex()
877 bool ARMBaseRegisterInfo::shouldCoalesce(MachineInstr *MI,  in shouldCoalesce()
936 bool ARMBaseRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC,  in shouldRewriteCopySrc()