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Searched refs:wptr_gpu_addr (Results 1 – 22 of 22) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_kernel_queue.h71 uint64_t wptr_gpu_addr; member
H A Dkfd_kernel_queue.c124 kq->wptr_gpu_addr = kq->wptr_mem->gpu_addr; in kq_initialize()
139 prop.write_ptr = (uint32_t *) kq->wptr_gpu_addr; in kq_initialize()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_mes.c570 mqd_prop.wptr_gpu_addr = p->wptr_gpu_addr; in amdgpu_mes_queue_init_mqd()
672 queue_input.wptr_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
692 queue->wptr_gpu_addr = qprops->wptr_gpu_addr; in amdgpu_mes_add_hw_queue()
840 queue_input.wptr_addr = ring->wptr_gpu_addr; in amdgpu_mes_map_legacy_queue()
888 queue_input.wptr_addr = ring->wptr_gpu_addr; in amdgpu_mes_reset_legacy_queue()
1086 props->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_mes_ring_to_queue_props()
H A Dsdma_v4_0.c1095 u64 wptr_gpu_addr; in sdma_v4_0_gfx_resume() local
1141 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_gfx_resume()
1143 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1145 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_gfx_resume()
1180 u64 wptr_gpu_addr; in sdma_v4_0_page_resume() local
1227 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v4_0_page_resume()
1229 lower_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
1231 upper_32_bits(wptr_gpu_addr)); in sdma_v4_0_page_resume()
H A Damdgpu_mes.h187 uint64_t wptr_gpu_addr; member
197 uint64_t wptr_gpu_addr; member
H A Damdgpu_ring.c309 ring->wptr_gpu_addr = in amdgpu_ring_init()
716 prop->wptr_gpu_addr = ring->wptr_gpu_addr; in amdgpu_ring_to_mqd_prop()
H A Dsdma_v3_0.c644 u64 wptr_gpu_addr; in sdma_v3_0_gfx_resume() local
707 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v3_0_gfx_resume()
710 lower_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
712 upper_32_bits(wptr_gpu_addr)); in sdma_v3_0_gfx_resume()
H A Dsdma_v4_4_2.c686 u64 wptr_gpu_addr; in sdma_v4_4_2_gfx_resume() local
751 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_gfx_resume()
753 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume()
755 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_gfx_resume()
792 u64 wptr_gpu_addr; in sdma_v4_4_2_page_resume() local
858 wptr_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in sdma_v4_4_2_page_resume()
860 lower_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume()
862 upper_32_bits(wptr_gpu_addr)); in sdma_v4_4_2_page_resume()
H A Dsdma_v7_0.c510 u64 wptr_gpu_addr; in sdma_v7_0_gfx_resume_instance() local
540 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v7_0_gfx_resume_instance()
542 lower_32_bits(wptr_gpu_addr)); in sdma_v7_0_gfx_resume_instance()
544 upper_32_bits(wptr_gpu_addr)); in sdma_v7_0_gfx_resume_instance()
918 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_0_mqd_init()
H A Dsdma_v6_0.c490 u64 wptr_gpu_addr; in sdma_v6_0_gfx_resume_instance() local
521 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v6_0_gfx_resume_instance()
523 lower_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume_instance()
525 upper_32_bits(wptr_gpu_addr)); in sdma_v6_0_gfx_resume_instance()
871 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
H A Dsdma_v5_2.c544 u64 wptr_gpu_addr; in sdma_v5_2_gfx_resume_instance() local
576 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_2_gfx_resume_instance()
578 lower_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume_instance()
580 upper_32_bits(wptr_gpu_addr)); in sdma_v5_2_gfx_resume_instance()
864 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
H A Dsdma_v5_0.c726 u64 wptr_gpu_addr; in sdma_v5_0_gfx_resume_instance() local
757 wptr_gpu_addr = ring->wptr_gpu_addr; in sdma_v5_0_gfx_resume_instance()
759 lower_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume_instance()
761 upper_32_bits(wptr_gpu_addr)); in sdma_v5_0_gfx_resume_instance()
1007 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
H A Dgfx_v11_0.c338 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx11_kiq_map_queues()
3636 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume() local
3666 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3668 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3670 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3703 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v11_0_cp_gfx_resume()
3705 lower_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
3707 upper_32_bits(wptr_gpu_addr)); in gfx_v11_0_cp_gfx_resume()
4052 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4217 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
H A Damdgpu_ring.h278 u64 wptr_gpu_addr; member
H A Dgfx_v12_0.c279 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v12_0_kiq_map_queues()
2639 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v12_0_cp_gfx_resume() local
2669 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v12_0_cp_gfx_resume()
2671 lower_32_bits(wptr_gpu_addr)); in gfx_v12_0_cp_gfx_resume()
2673 upper_32_bits(wptr_gpu_addr)); in gfx_v12_0_cp_gfx_resume()
2939 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
3103 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
H A Dgfx_v10_0.c3701 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx10_kiq_map_queues()
6466 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume() local
6499 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6501 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6503 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6536 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v10_0_cp_gfx_resume()
6538 lower_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6540 upper_32_bits(wptr_gpu_addr)); in gfx_v10_0_cp_gfx_resume()
6772 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6956 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
H A Dgfx_v8_0.c4254 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume() local
4284 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_cp_gfx_resume()
4285 WREG32(mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4286 WREG32(mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v8_0_cp_gfx_resume()
4364 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v8_0_kiq_kcq_enable()
4494 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c928 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v9_0_kiq_map_queues()
3369 u64 rb_addr, rptr_addr, wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume() local
3397 wptr_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_cp_gfx_resume()
3398 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_LO, lower_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3399 WREG32_SOC15(GC, 0, mmCP_RB_WPTR_POLL_ADDR_HI, upper_32_bits(wptr_gpu_addr)); in gfx_v9_0_cp_gfx_resume()
3620 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
H A Damdgpu.h815 uint64_t wptr_gpu_addr; member
H A Dmes_v11_0.c1134 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
H A Dmes_v12_0.c1218 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
H A Dgfx_v7_0.c2881 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()