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Searched refs:ras_block (Results 1 – 25 of 51) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_nbio.c34 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_nbio_ras_sw_init()
40 strcpy(ras->ras_block.ras_comm.name, "pcie_bif"); in amdgpu_nbio_ras_sw_init()
41 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__PCIE_BIF; in amdgpu_nbio_ras_sw_init()
42 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_nbio_ras_sw_init()
43 adev->nbio.ras_if = &ras->ras_block.ras_comm; in amdgpu_nbio_ras_sw_init()
56 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_nbio_ras_late_init() argument
59 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_nbio_ras_late_init()
63 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_nbio_ras_late_init()
74 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_nbio_ras_late_init()
H A Damdgpu_mmhub.c33 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mmhub_ras_sw_init()
39 strcpy(ras->ras_block.ras_comm.name, "mmhub"); in amdgpu_mmhub_ras_sw_init()
40 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MMHUB; in amdgpu_mmhub_ras_sw_init()
41 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_mmhub_ras_sw_init()
42 adev->mmhub.ras_if = &ras->ras_block.ras_comm; in amdgpu_mmhub_ras_sw_init()
H A Damdgpu_hdp.c35 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_hdp_ras_sw_init()
41 strcpy(ras->ras_block.ras_comm.name, "hdp"); in amdgpu_hdp_ras_sw_init()
42 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__HDP; in amdgpu_hdp_ras_sw_init()
43 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_hdp_ras_sw_init()
44 adev->hdp.ras_if = &ras->ras_block.ras_comm; in amdgpu_hdp_ras_sw_init()
H A Damdgpu_umc.c109 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_handle_bad_pages()
113 if (adev->umc.ras && adev->umc.ras->ras_block.hw_ops && in amdgpu_umc_handle_bad_pages()
300 strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc"); in amdgpu_umc_ras_sw_init()
301 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC; in amdgpu_umc_ras_sw_init()
303 adev->umc.ras_if = &ras->ras_block.ras_comm; in amdgpu_umc_ras_sw_init()
305 if (!ras->ras_block.ras_late_init) in amdgpu_umc_ras_sw_init()
308 if (!ras->ras_block.ras_cb) in amdgpu_umc_ras_sw_init()
309 ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb; in amdgpu_umc_ras_sw_init()
318 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_umc_ras_late_init()
325 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_umc_ras_late_init()
[all …]
H A Damdgpu_mca.c94 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mca_mp0_ras_sw_init()
100 strcpy(ras->ras_block.ras_comm.name, "mca.mp0"); in amdgpu_mca_mp0_ras_sw_init()
101 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp0_ras_sw_init()
103 adev->mca.mp0.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp0_ras_sw_init()
118 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_mca_mp1_ras_sw_init()
124 strcpy(ras->ras_block.ras_comm.name, "mca.mp1"); in amdgpu_mca_mp1_ras_sw_init()
125 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mp1_ras_sw_init()
127 adev->mca.mp1.ras_if = &ras->ras_block.ras_comm; in amdgpu_mca_mp1_ras_sw_init()
148 strcpy(ras->ras_block.ras_comm.name, "mca.mpio"); in amdgpu_mca_mpio_ras_sw_init()
149 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__MCA; in amdgpu_mca_mpio_ras_sw_init()
[all …]
H A Damdgpu_sdma.c100 struct ras_common_if *ras_block) in amdgpu_sdma_ras_late_init() argument
104 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_sdma_ras_late_init()
108 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_sdma_ras_late_init()
120 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_sdma_ras_late_init()
336 strcpy(ras->ras_block.ras_comm.name, "sdma"); in amdgpu_sdma_ras_sw_init()
337 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__SDMA; in amdgpu_sdma_ras_sw_init()
339 adev->sdma.ras_if = &ras->ras_block.ras_comm; in amdgpu_sdma_ras_sw_init()
342 if (!ras->ras_block.ras_late_init) in amdgpu_sdma_ras_sw_init()
343 ras->ras_block.ras_late_init = amdgpu_sdma_ras_late_init; in amdgpu_sdma_ras_sw_init()
346 if (!ras->ras_block.ras_cb) in amdgpu_sdma_ras_sw_init()
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H A Dmca_v3_0.c60 .ras_block = {
80 .ras_block = {
100 .ras_block = {
H A Damdgpu_jpeg.c285 int amdgpu_jpeg_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_jpeg_ras_late_init() argument
289 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_jpeg_ras_late_init()
293 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_jpeg_ras_late_init()
307 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_jpeg_ras_late_init()
320 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_jpeg_ras_sw_init()
326 strcpy(ras->ras_block.ras_comm.name, "jpeg"); in amdgpu_jpeg_ras_sw_init()
327 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__JPEG; in amdgpu_jpeg_ras_sw_init()
328 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_jpeg_ras_sw_init()
329 adev->jpeg.ras_if = &ras->ras_block.ras_comm; in amdgpu_jpeg_ras_sw_init()
331 if (!ras->ras_block.ras_late_init) in amdgpu_jpeg_ras_sw_init()
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H A Daldebaran.c353 tmp_adev->sdma.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
354 r = tmp_adev->sdma.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
355 &tmp_adev->sdma.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
363 tmp_adev->gfx.ras->ras_block.ras_late_init) { in aldebaran_mode2_restore_hwcontext()
364 r = tmp_adev->gfx.ras->ras_block.ras_late_init(tmp_adev, in aldebaran_mode2_restore_hwcontext()
365 &tmp_adev->gfx.ras->ras_block.ras_comm); in aldebaran_mode2_restore_hwcontext()
H A Damdgpu_ras.c99 if (!ras_block) in get_ras_block_str()
106 if (ras_block->block == AMDGPU_RAS_BLOCK__MCA) in get_ras_block_str()
109 return ras_block_string[ras_block->block]; in get_ras_block_str()
4051 struct ras_common_if *ras_block) in amdgpu_persistent_edc_harvesting() argument
4054 .head = *ras_block, in amdgpu_persistent_edc_harvesting()
4081 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init() argument
4154 struct ras_common_if *ras_block) in amdgpu_ras_block_late_init_default() argument
4161 struct ras_common_if *ras_block) in amdgpu_ras_block_late_fini() argument
4164 if (!ras_block) in amdgpu_ras_block_late_fini()
4167 amdgpu_ras_sysfs_remove(adev, ras_block); in amdgpu_ras_block_late_fini()
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H A Damdgpu_nbio.h51 struct amdgpu_ras_block_object ras_block; member
119 int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
H A Damdgpu_sdma.h103 struct amdgpu_ras_block_object ras_block; member
184 struct ras_common_if *ras_block);
H A Damdgpu_gfx.c923 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_gfx_ras_late_init()
930 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_gfx_ras_late_init()
943 amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0); in amdgpu_gfx_ras_late_init()
948 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_gfx_ras_late_init()
971 strcpy(ras->ras_block.ras_comm.name, "gfx"); in amdgpu_gfx_ras_sw_init()
972 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__GFX; in amdgpu_gfx_ras_sw_init()
974 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
977 if (!ras->ras_block.ras_late_init) in amdgpu_gfx_ras_sw_init()
981 if (!ras->ras_block.ras_cb) in amdgpu_gfx_ras_sw_init()
982 ras->ras_block.ras_cb = amdgpu_gfx_process_ras_data_cb; in amdgpu_gfx_ras_sw_init()
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H A Damdgpu_umc.h85 struct amdgpu_ras_block_object ras_block; member
136 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block);
H A Damdgpu_jpeg.h121 struct amdgpu_ras_block_object ras_block; member
162 struct ras_common_if *ras_block);
H A Damdgpu_ras.h712 int (*ras_late_init)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
713 void (*ras_fini)(struct amdgpu_device *adev, struct ras_common_if *ras_block);
837 struct ras_common_if *ras_block);
840 struct ras_common_if *ras_block);
901 const char *get_ras_block_str(struct ras_common_if *ras_block);
H A Damdgpu_vcn.c1260 int amdgpu_vcn_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_vcn_ras_late_init() argument
1264 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_vcn_ras_late_init()
1268 if (amdgpu_ras_is_supported(adev, ras_block->block)) { in amdgpu_vcn_ras_late_init()
1282 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_vcn_ras_late_init()
1295 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_vcn_ras_sw_init()
1301 strcpy(ras->ras_block.ras_comm.name, "vcn"); in amdgpu_vcn_ras_sw_init()
1302 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__VCN; in amdgpu_vcn_ras_sw_init()
1303 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__POISON; in amdgpu_vcn_ras_sw_init()
1304 adev->vcn.ras_if = &ras->ras_block.ras_comm; in amdgpu_vcn_ras_sw_init()
1306 if (!ras->ras_block.ras_late_init) in amdgpu_vcn_ras_sw_init()
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H A Damdgpu_hdp.h28 struct amdgpu_ras_block_object ras_block; member
H A Damdgpu_mmhub.h48 struct amdgpu_ras_block_object ras_block; member
H A Damdgpu_xgmi.c1195 static int amdgpu_xgmi_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in amdgpu_xgmi_ras_late_init() argument
1205 r = amdgpu_ras_block_late_init(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1224 amdgpu_ras_block_late_fini(adev, ras_block); in amdgpu_xgmi_ras_late_init()
1585 .ras_block = {
1600 err = amdgpu_ras_register_ras_block(adev, &ras->ras_block); in amdgpu_xgmi_ras_sw_init()
1606 strcpy(ras->ras_block.ras_comm.name, "xgmi_wafl"); in amdgpu_xgmi_ras_sw_init()
1607 ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL; in amdgpu_xgmi_ras_sw_init()
1608 ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE; in amdgpu_xgmi_ras_sw_init()
1609 adev->gmc.xgmi.ras_if = &ras->ras_block.ras_comm; in amdgpu_xgmi_ras_sw_init()
H A Damdgpu_xgmi.h80 struct amdgpu_ras_block_object ras_block; member
H A Dumc_v8_14.c156 .ras_block = {
H A Dmmhub_v1_8.c805 static int mmhub_v1_8_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in mmhub_v1_8_ras_late_init() argument
809 r = amdgpu_ras_block_late_init(adev, ras_block); in mmhub_v1_8_ras_late_init()
821 amdgpu_ras_block_late_fini(adev, ras_block); in mmhub_v1_8_ras_late_init()
827 .ras_block = {
H A Dumc_v12_0.c447 static int umc_v12_0_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block) in umc_v12_0_ras_late_init() argument
451 ret = amdgpu_umc_ras_late_init(adev, ras_block); in umc_v12_0_ras_late_init()
657 .ras_block = {
H A Dhdp_v4_0.c182 .ras_block = {

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