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Searched refs:max_backends_per_se (Results 1 – 21 of 21) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c834 adev->gfx.config.max_backends_per_se = gfx_info->v24.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
852 adev->gfx.config.max_backends_per_se = gfx_info->v27.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
873 adev->gfx.config.max_backends_per_se = gfx_info->v30.max_backends_per_se; in amdgpu_atomfirmware_get_gfx_info()
H A Dgfx_v6_0.c1335 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se/ in gfx_v6_0_get_rb_active_bitmap()
1469 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v6_0_setup_rb()
1488 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v6_0_setup_rb()
1590 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1607 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1624 adev->gfx.config.max_backends_per_se = 4; in gfx_v6_0_constants_init()
1641 adev->gfx.config.max_backends_per_se = 2; in gfx_v6_0_constants_init()
1658 adev->gfx.config.max_backends_per_se = 1; in gfx_v6_0_constants_init()
H A Dgfx_v7_0.c1599 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v7_0_get_rb_active_bitmap()
1759 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v7_0_setup_rb()
1777 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v7_0_setup_rb()
4189 adev->gfx.config.max_backends_per_se = 2; in gfx_v7_0_gpu_early_init()
4206 adev->gfx.config.max_backends_per_se = 4; in gfx_v7_0_gpu_early_init()
4222 adev->gfx.config.max_backends_per_se = 2; in gfx_v7_0_gpu_early_init()
4242 adev->gfx.config.max_backends_per_se = 1; in gfx_v7_0_gpu_early_init()
H A Damdgpu_gfx.h195 unsigned max_backends_per_se; member
H A Dgfx_v8_0.c1679 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1696 adev->gfx.config.max_backends_per_se = 4; in gfx_v8_0_gpu_early_init()
1743 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1759 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
1776 adev->gfx.config.max_backends_per_se = 1; in gfx_v8_0_gpu_early_init()
1794 adev->gfx.config.max_backends_per_se = 2; in gfx_v8_0_gpu_early_init()
3448 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v8_0_get_rb_active_bitmap()
3610 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v8_0_setup_rb()
3628 num_rb_pipes = min_t(unsigned, adev->gfx.config.max_backends_per_se * in gfx_v8_0_setup_rb()
H A Damdgpu_atombios.c749 adev->gfx.config.max_backends_per_se = gfx_info->info.max_backends_per_se; in amdgpu_atombios_get_gfx_info()
H A Damdgpu_discovery.c1593 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
1637 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v2.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
H A Damdgpu_debugfs.c899 config[no_regs++] = adev->gfx.config.max_backends_per_se; in amdgpu_debugfs_gca_config_read()
H A Damdgpu_kms.c878 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
H A Dgfx_v12_0.c1644 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v12_0_get_rb_active_bitmap()
1668 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v12_0_setup_rb()
H A Dgfx_v11_0.c1923 rb_mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se * in gfx_v11_0_get_rb_active_bitmap()
1947 rb_bitmap_width_per_sa = adev->gfx.config.max_backends_per_se / in gfx_v11_0_setup_rb()
H A Dgfx_v9_0.c2510 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v9_0_get_rb_active_bitmap()
2521 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v9_0_setup_rb()
H A Damdgpu_device.c2564 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
H A Dgfx_v10_0.c5055 mask = amdgpu_gfx_create_bitmask(adev->gfx.config.max_backends_per_se / in gfx_v10_0_get_rb_active_bitmap()
5067 u32 rb_bitmap_width_per_sh = adev->gfx.config.max_backends_per_se / in gfx_v10_0_setup_rb()
/linux-6.15/drivers/gpu/drm/radeon/
H A Dni.c884 rdev->config.cayman.max_backends_per_se = 4; in cayman_gpu_init()
922 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()
936 rdev->config.cayman.max_backends_per_se = 2; in cayman_gpu_init()
950 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()
957 rdev->config.cayman.max_backends_per_se = 1; in cayman_gpu_init()
1078 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1082 …for (i = 0; i < (rdev->config.cayman.max_backends_per_se * rdev->config.cayman.max_shader_engines)… in cayman_gpu_init()
1112 if ((rdev->config.cayman.max_backends_per_se == 1) && in cayman_gpu_init()
1124 rdev->config.cayman.max_backends_per_se * in cayman_gpu_init()
H A Dradeon_kms.c352 *value = rdev->config.cik.max_backends_per_se * in radeon_info_ioctl()
355 *value = rdev->config.si.max_backends_per_se * in radeon_info_ioctl()
358 *value = rdev->config.cayman.max_backends_per_se * in radeon_info_ioctl()
H A Dsi.c3084 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3101 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3119 rdev->config.si.max_backends_per_se = 4; in si_gpu_init()
3136 rdev->config.si.max_backends_per_se = 2; in si_gpu_init()
3153 rdev->config.si.max_backends_per_se = 1; in si_gpu_init()
3270 rdev->config.si.max_backends_per_se); in si_gpu_init()
H A Dradeon.h2088 unsigned max_backends_per_se; member
2127 unsigned max_backends_per_se; member
2158 unsigned max_backends_per_se; member
H A Dcik.c2330 u32 num_rbs = rdev->config.cik.max_backends_per_se * in cik_tiling_mode_table_init()
3182 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()
3199 rdev->config.cik.max_backends_per_se = 4; in cik_gpu_init()
3215 rdev->config.cik.max_backends_per_se = 2; in cik_gpu_init()
3235 rdev->config.cik.max_backends_per_se = 1; in cik_gpu_init()
3337 rdev->config.cik.max_backends_per_se); in cik_gpu_init()
/linux-6.15/drivers/gpu/drm/amd/include/
H A Datomfirmware.h1797 uint8_t max_backends_per_se; member
1817 uint8_t max_backends_per_se; member
1842 uint8_t max_backends_per_se; member
1877 uint8_t max_backends_per_se; member
1918 uint8_t max_backends_per_se; member
H A Datombios.h5656 UCHAR max_backends_per_se; member
5669 UCHAR max_backends_per_se; member