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Searched refs:drm_dp_dpcd_write (Results 1 – 25 of 25) sorted by relevance

/linux-6.15/drivers/gpu/drm/hisilicon/hibmc/dp/
H A Ddp_link.c29 ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, sizeof(buf)); in hibmc_dp_link_training_configure()
38 ret = drm_dp_dpcd_write(&dp->aux, DP_DOWNSPREAD_CTRL, buf, sizeof(buf)); in hibmc_dp_link_training_configure()
87 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_PATTERN_SET, &buf, sizeof(buf)); in hibmc_dp_link_set_pattern()
113 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, train_set, dp->link.cap.lanes); in hibmc_dp_link_training_cr_pre()
209 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, dp->link.train_set, in hibmc_dp_link_training_cr()
258 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in hibmc_dp_link_training_channel_eq()
/linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_helpers.c594 return drm_dp_dpcd_write(&aconnector->dm_dp_aux.aux, in dm_helpers_dp_write_dpcd()
652 ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_DATA, rc_data, sizeof(rc_data)); in execute_synaptics_rc_command()
662 ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_OFFSET, rc_offset, sizeof(rc_offset)); in execute_synaptics_rc_command()
669 ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_LENGTH, rc_length, sizeof(rc_length)); in execute_synaptics_rc_command()
675 ret = drm_dp_dpcd_write(aux, SYNAPTICS_RC_COMMAND, &rc_cmd, sizeof(rc_cmd)); in execute_synaptics_rc_command()
794 ret = drm_dp_dpcd_write(aux, DP_DSC_ENABLE, &enable, 1); in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
803 ret = drm_dp_dpcd_write(aux, DP_DSC_ENABLE, &enable, 1); in write_dsc_enable_synaptics_non_virtual_dpcd_mst()
842 ret = drm_dp_dpcd_write(port->passthrough_aux, in dm_helpers_dp_write_dsc_enable()
850 ret = drm_dp_dpcd_write(aconnector->dsc_aux, in dm_helpers_dp_write_dsc_enable()
858 ret = drm_dp_dpcd_write(aconnector->dsc_aux, in dm_helpers_dp_write_dsc_enable()
[all …]
H A Damdgpu_dm.c2827 ret = drm_dp_dpcd_write(mgr->aux, DP_GUID, buf, sizeof(buf)); in resume_mst_branch_status()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_lspcon.c366 ret = drm_dp_dpcd_write(aux, reg, data, 8); in _lspcon_parade_write_infoframe_blocks()
381 ret = drm_dp_dpcd_write(aux, reg, &avi_if_ctrl, 1); in _lspcon_parade_write_infoframe_blocks()
440 ret = drm_dp_dpcd_write(aux, reg, (void *)data, 1); in _lspcon_write_avi_infoframe_mca()
466 ret = drm_dp_dpcd_write(aux, reg, &val, 1); in _lspcon_write_avi_infoframe_mca()
H A Dintel_dp_aux_backlight.c223 if (drm_dp_dpcd_write(&intel_dp->aux, INTEL_EDP_BRIGHTNESS_NITS_LSB, buf, in intel_dp_aux_hdr_set_aux_backlight()
275 ret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_aux_write_content_luminance()
399 ret = drm_dp_dpcd_write(&intel_dp->aux, in intel_dp_aux_write_panel_luminance_override()
492 ret = drm_dp_dpcd_write(&intel_dp->aux, DP_EDP_PANEL_TARGET_LUMINANCE_VALUE, in intel_dp_aux_vesa_set_luminance()
H A Dintel_dp_hdcp.c66 dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN, in intel_dp_hdcp_write_an_aksv()
82 dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV, in intel_dp_hdcp_write_an_aksv()
477 ret = drm_dp_dpcd_write(aux, in intel_dp_hdcp2_write_msg()
H A Dintel_dp_link_training.c535 return drm_dp_dpcd_write(&intel_dp->aux, reg, buf, len) == len; in intel_dp_set_link_train()
642 ret = drm_dp_dpcd_write(&intel_dp->aux, reg, in intel_dp_update_link_train()
708 drm_dp_dpcd_write(&intel_dp->aux, DP_DOWNSPREAD_CTRL, link_config, 2); in intel_dp_link_training_set_mode()
729 drm_dp_dpcd_write(&intel_dp->aux, DP_LINK_BW_SET, link_config, in intel_dp_link_training_set_bw()
1075 return drm_dp_dpcd_write(&intel_dp->aux, reg, &val, 1) == 1; in intel_dp_disable_dpcd_training_pattern()
H A Dintel_dp_test.c329 drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET, in intel_dp_process_phy_request()
H A Dintel_dp.c3486 if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0) { in intel_dp_init_source_oui()
4467 if (drm_dp_dpcd_write(&intel_dp->aux, DP_SINK_COUNT_ESI + 1, in intel_dp_ack_sink_irq_esi()
/linux-6.15/drivers/gpu/drm/display/
H A Ddrm_dp_cec.c115 err = drm_dp_dpcd_write(aux, DP_CEC_LOGICAL_ADDRESS_MASK, mask, 2); in drm_dp_cec_adap_log_addr()
126 err = drm_dp_dpcd_write(aux, DP_CEC_TX_MESSAGE_BUFFER, in drm_dp_cec_adap_transmit()
H A Ddrm_dp_helper.c756 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, in drm_dp_dpcd_write() function
770 EXPORT_SYMBOL(drm_dp_dpcd_write);
880 ret = drm_dp_dpcd_write(aux, DP_PAYLOAD_ALLOCATE_SET, payload_alloc, 3); in drm_dp_dpcd_write_payload()
1064 if (drm_dp_dpcd_write(aux, DP_DEVICE_SERVICE_IRQ_VECTOR, in drm_dp_send_real_edid_checksum()
1072 if (drm_dp_dpcd_write(aux, DP_TEST_EDID_CHECKSUM, in drm_dp_send_real_edid_checksum()
1080 if (drm_dp_dpcd_write(aux, DP_TEST_RESPONSE, &test_resp, 1) < 1) { in drm_dp_send_real_edid_checksum()
3845 ret = drm_dp_dpcd_write(aux, DP_PCON_HDMI_PPS_OVERRIDE_BASE, &pps_buf, 128); in drm_dp_pcon_pps_override_buf()
3870 ret = drm_dp_dpcd_write(aux, DP_PCON_HDMI_PPS_OVRD_SLICE_HEIGHT, &pps_param[0], 2); in drm_dp_pcon_pps_override_param()
3873 ret = drm_dp_dpcd_write(aux, DP_PCON_HDMI_PPS_OVRD_SLICE_WIDTH, &pps_param[2], 2); in drm_dp_pcon_pps_override_param()
3876 ret = drm_dp_dpcd_write(aux, DP_PCON_HDMI_PPS_OVRD_BPP, &pps_param[4], 2); in drm_dp_pcon_pps_override_param()
[all …]
H A Ddrm_dp_aux_dev.c214 res = drm_dp_dpcd_write(aux_dev->aux, pos, buf, todo); in auxdev_write_iter()
H A Ddrm_dp_mst_topology.c2204 ret = drm_dp_dpcd_write(mstb->mgr->aux, in drm_dp_check_mstb_guid()
2747 ret = drm_dp_dpcd_write(mgr->aux, regbase + offset, in drm_dp_send_sideband_msg()
/linux-6.15/drivers/gpu/drm/tegra/
H A Ddp.c351 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in drm_dp_link_configure()
489 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, values, lanes); in drm_dp_link_apply_training()
502 err = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_1_SET2, values, in drm_dp_link_apply_training()
/linux-6.15/include/drm/display/
H A Ddrm_dp_helper.h527 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
557 return drm_dp_dpcd_write(aux, offset, &value, 1); in drm_dp_dpcd_writeb()
/linux-6.15/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c256 retval = drm_dp_dpcd_write(&dp->aux, DP_LINK_BW_SET, buf, 2); in analogix_dp_link_start()
287 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, buf, in analogix_dp_link_start()
444 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_clock_recovery()
516 retval = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, in analogix_dp_process_equalizer_training()
H A Danalogix-anx6345.c228 err = drm_dp_dpcd_write(&anx6345->aux, DP_LINK_BW_SET, dpcd, in anx6345_dp_link_training()
H A Danalogix-anx78xx.c736 err = drm_dp_dpcd_write(&anx78xx->aux, DP_LINK_BW_SET, dpcd, in anx78xx_dp_link_training()
/linux-6.15/drivers/gpu/drm/msm/dp/
H A Ddp_ctrl.c115 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in msm_dp_aux_link_configure()
1078 ret = drm_dp_dpcd_write(ctrl->aux, DP_TRAINING_LANE0_SET, in msm_dp_ctrl_update_vx_px()
1297 drm_dp_dpcd_write(ctrl->aux, DP_DOWNSPREAD_CTRL, encoding, 2); in msm_dp_ctrl_link_train()
1301 drm_dp_dpcd_write(ctrl->aux, DP_EDP_CONFIGURATION_SET, in msm_dp_ctrl_link_train()
1496 drm_dp_dpcd_write(ctrl->aux, DP_PSR_EN_CFG, &cfg, 1); in msm_dp_ctrl_config_psr()
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c511 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in amdgpu_atombios_dp_update_vs_emph()
/linux-6.15/drivers/gpu/drm/bridge/
H A Dtc358767.c1189 ret = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, tmp, 2); in tc_main_link_enable()
1197 ret = drm_dp_dpcd_write(aux, DP_DOWNSPREAD_CTRL, tmp, 2); in tc_main_link_enable()
1206 ret = drm_dp_dpcd_write(aux, DP_TRAINING_LANE0_SET, tmp, 2); in tc_main_link_enable()
H A Dite-it6505.c1842 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in it6505_drm_dp_link_configure()
/linux-6.15/drivers/gpu/drm/radeon/
H A Datombios_dp.c556 drm_dp_dpcd_write(dp_info->aux, DP_TRAINING_LANE0_SET, in radeon_dp_update_vs_emph()
/linux-6.15/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c731 ret = drm_dp_dpcd_write(&dp->aux, DP_TRAINING_LANE0_SET, train_set, in zynqmp_dp_update_vs_emph()
1852 ret = drm_dp_dpcd_write(&dp->aux, DP_LINK_QUAL_LANE0_SET, in zynqmp_dp_set_test_pattern()
/linux-6.15/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c638 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); in cdns_mhdp_link_configure()
1478 drm_dp_dpcd_write(&mhdp->aux, DP_DOWNSPREAD_CTRL, amp, 2); in cdns_mhdp_link_up()