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Searched refs:IPU (Results 1 – 25 of 28) sorted by relevance

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/linux-6.15/drivers/media/pci/intel/
H A DKconfig8 tristate "Intel IPU Bridge"
12 The IPU bridge is a helper library for Intel IPU drivers to
/linux-6.15/drivers/gpu/drm/ingenic/
H A DKconfig25 bool "IPU support for Ingenic SoCs"
27 Choose this option to enable support for the IPU found in Ingenic SoCs.
29 The Image Processing Unit (IPU) will appear as a second primary plane.
/linux-6.15/Documentation/devicetree/bindings/display/imx/
H A Dfsl-imx-drm.txt5 IPU or other display interface nodes that comprise the graphics subsystem.
10 of IPU devices
36 - fsl,prg: phandle to prg node associated with this IPU instance
126 Port 0 is the input port connected to the IPU display interface,
H A Dldb.txt14 multiplexer in the front to select any of the four IPU display
/linux-6.15/Documentation/devicetree/bindings/remoteproc/
H A Dti,omap-remoteproc.yaml21 The OMAP SoCs usually have a DSP processor sub-system and/or an IPU processor
23 C66x or C67x family of DSP cores as the main execution unit. The IPU processor
108 'reg-names'. These are mandatory for all DSP and IPU
258 //Example 2: OMAP5 IPU
260 /* IPU Reserved Memory node */
273 /* IPU node */
/linux-6.15/Documentation/devicetree/bindings/media/
H A Dimx.txt14 sensor interface ports of IPU devices
34 to the i.MX IPU CSIs.
/linux-6.15/arch/arm/boot/dts/ti/omap/
H A Ddra74-ipu-dsp-common.dtsi3 * Common IPU and DSP data for TI DRA74x/DRA76x/AM572x/AM574x platforms
H A Ddra7-ipu-dsp-common.dtsi3 * Common IPU and DSP data for TI DRA7xx/AM57xx platforms
/linux-6.15/drivers/gpu/ipu-v3/
H A DKconfig11 Processing Unit. This option only enables IPU base support.
/linux-6.15/Documentation/admin-guide/media/
H A Dipu6-isys.rst34 firmware authentication, DMA mapping and IPU-MMU (internal Memory mapping Unit)
86 machine, ov01a10 sensor is connected to IPU ISYS CSI-2 port 2, which can
95 # This example assumes /dev/media0 as the IPU ISYS media device
H A Dimx.rst9 The Freescale i.MX5/6 contains an Image Processing Unit (IPU), which
13 For image capture, the IPU contains the following internal subunits:
43 The IPU time-shares the IC task operations. The time-slice granularity
63 In addition to the IPU internal subunits, there are also two units
64 outside the IPU that are also involved in video capture on i.MX:
148 is a "CSI-2 to IPU gasket". The gasket acts as a demultiplexer of the
H A Dimx7.rst10 Unit (IPU); because of that the capabilities to perform operations or
/linux-6.15/Documentation/devicetree/bindings/display/
H A Dingenic,ipu.yaml7 title: Ingenic SoCs Image Processing Unit (IPU)
H A Dingenic,lcd.yaml56 description: Link to the Image Processing Unit (IPU).
/linux-6.15/Documentation/userspace-api/media/drivers/
H A Dimx-uapi.rst34 this happens, the IPU triggers a mechanism to re-establish vertical
46 While the reason for this observation isn't known (the IPU dummy
/linux-6.15/arch/arm/boot/dts/nxp/imx/
H A Dimx53-qsb-common.dtsi330 fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */
331 fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */
H A Dimx6q-utilite-pro.dts177 * A single IPU is not able to drive both display interfaces available on the
/linux-6.15/Documentation/devicetree/bindings/reset/
H A Dfsl,imx-src.yaml14 IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
/linux-6.15/drivers/misc/mei/
H A DKconfig78 between IVSC for context sensing and IPU for typical media usage.
/linux-6.15/Documentation/devicetree/bindings/dma/
H A Dfsl,imx-sdma.yaml88 - IPU Memory: 19
/linux-6.15/Documentation/driver-api/media/drivers/
H A Dipu6.rst120 inter-processor communication mechanism between the IPU scalar processors and
123 memory region via the IPU MMU. The Syscom queues are FIFO fixed depth queues
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-fs-f2fs54 0x00 DISABLE disable IPU(=default option in LFS mode)
61 flash storages. IPU will be triggered only if the
64 0x20 ASYNC do IPU given by asynchronous write requests
65 0x40 NOCACHE disable IPU bio cache
66 0x80 HONOR_OPU_WRITE use OPU write prior to IPU write if inode has
/linux-6.15/Documentation/admin-guide/hw-vuln/
H A Dprocessor_mmio_stale_data.rst252 Intel processors or platforms, utilizing the Intel Platform Update (IPU)
256 longer provide Servicing, such as through IPU or other similar update
H A Dindirect-target-selection.rst22 executed prior to the IBPB. This is fixed by the IPU 2025.1 microcode, which
/linux-6.15/drivers/mailbox/
H A DKconfig92 OMAP2/3; or IPU, IVA HD and DSP in OMAP4/5. Say Y here if you

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