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Searched refs:msix (Results 1 – 25 of 48) sorted by relevance

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/freebsd-14.2/sys/amd64/vmm/io/
H A Dppt.c107 } msix; member
277 res = ppt->msix.res[idx]; in ppt_teardown_msix_intr()
286 ppt->msix.res[idx] = NULL; in ppt_teardown_msix_intr()
287 ppt->msix.cookie[idx] = NULL; in ppt_teardown_msix_intr()
295 if (ppt->msix.num_msgs == 0) in ppt_teardown_msix()
312 ppt->msix.msix_table_rid = 0; in ppt_teardown_msix()
314 if (ppt->msix.msix_pba_res) { in ppt_teardown_msix()
319 ppt->msix.msix_pba_rid = 0; in ppt_teardown_msix()
322 ppt->msix.num_msgs = 0; in ppt_teardown_msix()
669 ppt->msix.startrid = 1; in ppt_setup_msix()
[all …]
/freebsd-14.2/sys/dev/pci/
H A Dpci.c1662 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_write_msix_entry() local
1679 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_enable_msix_method() local
1704 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_mask_msix() local
1723 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_unmask_msix() local
1742 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_pending_msix() local
1760 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_resume_msix() local
1969 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_remap_msix_method() local
2090 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_release_msix() local
2143 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_msix_count_method() local
2154 struct pcicfg_msix *msix = &dinfo->cfg.msix; in pci_msix_pba_bar_method() local
[all …]
/freebsd-14.2/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Dal,alpine-msix.txt7 - compatible: should be "al,alpine-msix"
17 msix: msix {
18 compatible = "al,alpine-msix";
/freebsd-14.2/sys/contrib/device-tree/src/arm/
H A Dalpine.dtsi164 msi-parent = <&msix>;
167 msix: msix@fbe00000 { label
168 compatible = "al,alpine-msix";
/freebsd-14.2/sys/dev/igc/
H A Dif_igc.h279 u32 msix; member
288 u32 msix; member
325 int msix; member
H A Dif_igc.c976 IGC_WRITE_REG(hw, IGC_EITR(que->msix), que->eitr_setting); in igc_neweitr()
1065 struct tx_ring *txr = &sc->tx_queues[que->msix].txr; in igc_msix_que()
1463 igc_if_msix_intr_assign(if_ctx_t ctx, int msix) in igc_if_msix_intr_assign() argument
1482 rx_que->msix = vector; in igc_if_msix_intr_assign()
1502 tx_que->msix = (vector % sc->rx_num_queues); in igc_if_msix_intr_assign()
1552 ivar |= (rx_que->msix | IGC_IVAR_VALID) << 16; in igc_configure_queues()
1555 ivar |= rx_que->msix | IGC_IVAR_VALID; in igc_configure_queues()
1566 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 24; in igc_configure_queues()
1569 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 8; in igc_configure_queues()
1588 IGC_WRITE_REG(hw, IGC_EITR(rx_que->msix), newitr); in igc_configure_queues()
[all …]
/freebsd-14.2/sys/contrib/device-tree/src/arm64/al/
H A Dalpine-v2.dtsi142 msi-parent = <&msix>;
145 msix: msix@fbe00000 { label
146 compatible = "al,alpine-msix";
/freebsd-14.2/sys/contrib/device-tree/src/arm64/amazon/
H A Dalpine-v2.dtsi142 msi-parent = <&msix>;
145 msix: msix@fbe00000 { label
146 compatible = "al,alpine-msix";
H A Dalpine-v3.dtsi348 msi-parent = <&msix>;
351 msix: msix@fbe00000 { label
352 compatible = "al,alpine-msix";
/freebsd-14.2/sys/dev/e1000/
H A Dif_em.h444 u32 msix; member
453 u32 msix; member
489 int msix; member
H A Dif_em.c1600 if (hw->mac.type == e1000_82574 && que->msix) { in em_newitr()
2266 em_if_msix_intr_assign(if_ctx_t ctx, int msix) in em_if_msix_intr_assign() argument
2285 rx_que->msix = vector; in em_if_msix_intr_assign()
2296 sc->ivars |= (8 | rx_que->msix) << (i * 4); in em_if_msix_intr_assign()
2312 tx_que->msix = (vector % sc->rx_num_queues); in em_if_msix_intr_assign()
2323 sc->ivars |= (8 | tx_que->msix) << (8 + (i * 4)); in em_if_msix_intr_assign()
2386 ivar |= (rx_que->msix | E1000_IVAR_VALID) << 16; in igb_configure_queues()
2389 ivar |= rx_que->msix | E1000_IVAR_VALID; in igb_configure_queues()
2403 ivar |= (tx_que->msix | E1000_IVAR_VALID) << 8; in igb_configure_queues()
2422 ivar |= rx_que->msix | E1000_IVAR_VALID; in igb_configure_queues()
[all …]
/freebsd-14.2/sys/dev/ixgbe/
H A Dixgbe.h319 u32 msix; /* This queue's MSIX vector */ member
331 u32 msix; /* This queue's MSIX vector */ member
377 int msix; member
H A Dif_ixv.c704 ixv_disable_queue(sc, que->msix); in ixv_msix_que()
1023 ixv_if_msix_intr_assign(if_ctx_t ctx, int msix) in ixv_if_msix_intr_assign() argument
1046 rx_que->msix = vector; in ixv_if_msix_intr_assign()
1052 tx_que->msix = i % sc->num_rx_queues; in ixv_if_msix_intr_assign()
1054 &sc->rx_queues[tx_que->msix].que_irq, in ixv_if_msix_intr_assign()
1618 ixv_enable_queue(sc, que->msix); in ixv_if_enable_intr()
1691 ixv_set_ivar(sc, i, que->msix, 0); in ixv_configure_ivars()
1693 ixv_set_ivar(sc, i, que->msix, 1); in ixv_configure_ivars()
1695 IXGBE_WRITE_REG(&sc->hw, IXGBE_VTEITR(que->msix), in ixv_configure_ivars()
H A Dif_fdir.c142 input, common, que->msix); in ixgbe_atr()
H A Dif_ix.c2126 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) in ixgbe_if_msix_intr_assign() argument
2150 rx_que->msix = vector; in ixgbe_if_msix_intr_assign()
2155 tx_que->msix = i % sc->num_rx_queues; in ixgbe_if_msix_intr_assign()
2157 &sc->rx_queues[tx_que->msix].que_irq, in ixgbe_if_msix_intr_assign()
2195 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), in ixgbe_perform_aim()
2258 ixgbe_disable_queue(sc, que->msix); in ixgbe_msix_que()
2698 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); in ixgbe_sysctl_interrupt_rate_handler()
3331 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); in ixgbe_configure_ivars()
3340 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); in ixgbe_configure_ivars()
3898 ixgbe_enable_queue(sc, que->msix); in ixgbe_if_enable_intr()
[all …]
/freebsd-14.2/sys/dts/arm/
H A Dannapurna-alpine.dts178 msix: msix { label
179 compatible = "annapurna-labs,al-msix";
199 msi-parent = <&msix>;
/freebsd-14.2/sys/dev/iavf/
H A Diavf_iflib.h203 u32 msix; member
222 u32 msix; member
H A Dif_iavf_iflib.c57 static int iavf_if_msix_intr_assign(if_ctx_t ctx, int msix);
821 iavf_if_msix_intr_assign(if_ctx_t ctx, int msix __unused) in iavf_if_msix_intr_assign()
857 rx_que->msix = vector; in iavf_if_msix_intr_assign()
868 tx_que->msix = (i % vsi->shared->isc_nrxqsets) + 1; in iavf_if_msix_intr_assign()
927 iavf_enable_queue_irq(hw, rx_que->msix - 1); in iavf_if_rx_queue_intr_enable()
948 iavf_enable_queue_irq(hw, tx_que->msix - 1); in iavf_if_tx_queue_intr_enable()
2062 sbuf_printf(buf, "(rxq %3d): %d\n", i, rx_que->msix); in iavf_sysctl_queue_interrupt_table()
2066 sbuf_printf(buf, "(txq %3d): %d\n", i, tx_que->msix); in iavf_sysctl_queue_interrupt_table()
/freebsd-14.2/sys/dev/oce/
H A Doce_user.h75 } msix; member
/freebsd-14.2/sys/dev/ice/
H A Dice_rdma.h248 struct ice_rdma_msix msix; member
/freebsd-14.2/sys/dev/ixl/
H A Dixl.h386 u32 msix; member
396 u32 msix; /* This queue's MSIX vector */ member
H A Dixl_iw.c41 #define IXL_IW_VEC_BASE(pf) ((pf)->msix - (pf)->iw_msix)
43 #define IXL_IW_VEC_LIMIT(pf) ((pf)->msix)
H A Dif_ixl.c104 static int ixl_if_msix_intr_assign(if_ctx_t ctx, int msix);
1073 ixl_if_msix_intr_assign(if_ctx_t ctx, int msix) in ixl_if_msix_intr_assign() argument
1116 rx_que->msix = vector; in ixl_if_msix_intr_assign()
1130 tx_que->msix = (i % vsi->shared->isc_nrxqsets) + 1; in ixl_if_msix_intr_assign()
1178 ixl_disable_queue(hw, rx_que->msix - 1); in ixl_if_disable_intr()
1194 ixl_enable_queue(hw, rx_que->msix - 1); in ixl_if_rx_queue_intr_enable()
1206 ixl_enable_queue(hw, tx_que->msix - 1); in ixl_if_tx_queue_intr_enable()
/freebsd-14.2/sys/dev/tws/
H A Dtws.h237 struct tws_msix_info msix; /* msix info */ member
/freebsd-14.2/sys/dev/irdma/
H A Dicrdma.c529 rf->msix_count = peer->msix.count; in irdma_fill_device_info()
530 rf->msix_info.entry = peer->msix.base; in irdma_fill_device_info()
531 rf->msix_info.vector = peer->msix.count; in irdma_fill_device_info()

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