Lines Matching refs:msix
2126 ixgbe_if_msix_intr_assign(if_ctx_t ctx, int msix) in ixgbe_if_msix_intr_assign() argument
2150 rx_que->msix = vector; in ixgbe_if_msix_intr_assign()
2155 tx_que->msix = i % sc->num_rx_queues; in ixgbe_if_msix_intr_assign()
2157 &sc->rx_queues[tx_que->msix].que_irq, in ixgbe_if_msix_intr_assign()
2195 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(que->msix), in ixgbe_perform_aim()
2258 ixgbe_disable_queue(sc, que->msix); in ixgbe_msix_que()
2698 reg = IXGBE_READ_REG(&que->sc->hw, IXGBE_EITR(que->msix)); in ixgbe_sysctl_interrupt_rate_handler()
2715 IXGBE_WRITE_REG(&que->sc->hw, IXGBE_EITR(que->msix), reg); in ixgbe_sysctl_interrupt_rate_handler()
3331 ixgbe_set_ivar(sc, rxr->me, rx_que->msix, 0); in ixgbe_configure_ivars()
3334 IXGBE_WRITE_REG(&sc->hw, IXGBE_EITR(rx_que->msix), newitr); in ixgbe_configure_ivars()
3340 ixgbe_set_ivar(sc, txr->me, tx_que->msix, 1); in ixgbe_configure_ivars()
3898 ixgbe_enable_queue(sc, que->msix); in ixgbe_if_enable_intr()
3946 ixgbe_enable_queue(sc, que->msix); in ixgbe_if_rx_queue_intr_enable()