Lines Matching refs:msix
976 IGC_WRITE_REG(hw, IGC_EITR(que->msix), que->eitr_setting); in igc_neweitr()
1065 struct tx_ring *txr = &sc->tx_queues[que->msix].txr; in igc_msix_que()
1463 igc_if_msix_intr_assign(if_ctx_t ctx, int msix) in igc_if_msix_intr_assign() argument
1482 rx_que->msix = vector; in igc_if_msix_intr_assign()
1502 tx_que->msix = (vector % sc->rx_num_queues); in igc_if_msix_intr_assign()
1552 ivar |= (rx_que->msix | IGC_IVAR_VALID) << 16; in igc_configure_queues()
1555 ivar |= rx_que->msix | IGC_IVAR_VALID; in igc_configure_queues()
1566 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 24; in igc_configure_queues()
1569 ivar |= (tx_que->msix | IGC_IVAR_VALID) << 8; in igc_configure_queues()
1588 IGC_WRITE_REG(hw, IGC_EITR(rx_que->msix), newitr); in igc_configure_queues()
2593 reg = IGC_READ_REG(hw, IGC_EITR(rque->msix)); in igc_sysctl_interrupt_rate_handler()