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Searched refs:getOptLevel (Results 1 – 25 of 73) sorted by relevance

123

/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.cpp483 if (TM.getOptLevel() != CodeGenOptLevel::None) in AArch64PassConfig()
590 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
624 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
681 if (getOptLevel() != CodeGenOptLevel::None) in addCodeGenPrepare()
692 getOptLevel() != CodeGenOptLevel::None) in addInstSelector()
699 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
704 if (getOptLevel() == CodeGenOptLevel::None) { in addPreLegalizeMachineIR()
736 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
737 if (getOptLevel() != CodeGenOptLevel::None) in addGlobalInstructionSelect()
746 if (TM->getOptLevel() != CodeGenOptLevel::None) in addMachineSSAOptimization()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetMachine.cpp440 if (getOptLevel() == CodeGenOptLevel::Aggressive) in addIRPasses()
448 if (TM->getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
460 if (getOptLevel() != CodeGenOptLevel::None) in addCodeGenPrepare()
486 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addPreISel()
508 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
523 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
528 if (getOptLevel() != CodeGenOptLevel::None) { in addPreRegAlloc()
545 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
557 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
574 if (getOptLevel() != CodeGenOptLevel::None) { in addPreSched2()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetMachine.cpp418 if (TM.getOptLevel() != CodeGenOptLevel::None) in PPCPassConfig()
458 if (TM->getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
467 if (TM->getOptLevel() == CodeGenOptLevel::Aggressive && in addIRPasses()
494 if (MergeStringPool && getOptLevel() != CodeGenOptLevel::None) in addPreISel()
500 if (!DisableCTRLoops && getOptLevel() != CodeGenOptLevel::None) in addPreISel()
545 if (ReduceCRLogical && getOptLevel() != CodeGenOptLevel::None) in addMachineSSAOptimization()
556 if (getOptLevel() != CodeGenOptLevel::None) { in addPreRegAlloc()
574 if (getOptLevel() != CodeGenOptLevel::None) in addPreRegAlloc()
579 if (getOptLevel() != CodeGenOptLevel::None) in addPreSched2()
587 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetMachine.cpp226 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
237 addPass(createSystemZISelDag(getSystemZTargetMachine(), getOptLevel())); in addInstSelector()
239 if (getOptLevel() != CodeGenOptLevel::None) in addInstSelector()
261 if (getOptLevel() == CodeGenOptLevel::None) in addPostRegAlloc()
266 if (getOptLevel() != CodeGenOptLevel::None) in addPreSched2()
274 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
300 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
307 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetMachine.cpp347 if (TM.getOptLevel() != CodeGenOptLevel::None) in RISCVPassConfig()
444 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
457 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addPreISel()
480 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
485 if (getOptLevel() == CodeGenOptLevel::None) { in addPreLegalizeMachineIR()
498 if (getOptLevel() != CodeGenOptLevel::None) in addPreRegBankSelect()
508 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
534 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addPreEmitPass2()
568 if (TM->getOptLevel() != CodeGenOptLevel::None) in addPreRegAlloc()
571 if (TM->getOptLevel() != CodeGenOptLevel::None && in addPreRegAlloc()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetMachine.cpp450 if (TM->getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
476 addPass(createX86ISelDag(getX86TargetMachine(), getOptLevel())); in addInstSelector()
480 getOptLevel() != CodeGenOptLevel::None) in addInstSelector()
489 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
504 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
525 if (getOptLevel() != CodeGenOptLevel::None) { in addPreRegAlloc()
537 if (getOptLevel() != CodeGenOptLevel::None) in addPreRegAlloc()
555 if (getOptLevel() != CodeGenOptLevel::None) in addPostRegAlloc()
565 if (getOptLevel() != CodeGenOptLevel::None) { in addPreEmitPass()
574 if (getOptLevel() != CodeGenOptLevel::None) { in addPreEmitPass()
[all …]
H A DX86SpeculativeExecutionSideEffectSuppression.cpp91 const auto &OptLevel = MF.getTarget().getOptLevel(); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DCodeGenPassBuilder.h269 CodeGenOptLevel getOptLevel() const { return TM.getOptLevel(); } in getOptLevel() function
723 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
748 if (getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
751 if (getOptLevel() != CodeGenOptLevel::None && in addIRPasses()
822 if (getOptLevel() != CodeGenOptLevel::None && !Opt.DisableCGP) in addCodeGenPrepare()
946 if (getOptLevel() != CodeGenOptLevel::None) { in addMachinePasses()
975 if (getOptLevel() != CodeGenOptLevel::None) { in addMachinePasses()
983 if (getOptLevel() != CodeGenOptLevel::None) in addMachinePasses()
998 if (getOptLevel() != CodeGenOptLevel::None && in addMachinePasses()
1010 if (getOptLevel() != CodeGenOptLevel::None) in addMachinePasses()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetPassConfig.cpp600 return TM->getOptLevel(); in getOptLevel()
813 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
859 if (getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
880 if (getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
907 addPass(createDwarfEHPass(getOptLevel())); in addPassesToHandleExceptions()
914 addPass(createDwarfEHPass(getOptLevel())); in addPassesToHandleExceptions()
1098 if (getOptLevel() != CodeGenOptLevel::None) { in addMachinePasses()
1144 if (getOptLevel() != CodeGenOptLevel::None) { in addMachinePasses()
1155 if (getOptLevel() != CodeGenOptLevel::None) in addMachinePasses()
1170 if (getOptLevel() != CodeGenOptLevel::None && in addMachinePasses()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTargetMachine.cpp334 bool NoOpt = (getOptLevel() == CodeGenOptLevel::None); in addIRPasses()
367 bool NoOpt = (getOptLevel() == CodeGenOptLevel::None); in addInstSelector()
372 addPass(createHexagonISelDag(TM, getOptLevel())); in addInstSelector()
405 if (getOptLevel() != CodeGenOptLevel::None) { in addPreRegAlloc()
415 if (TM->getOptLevel() >= CodeGenOptLevel::Default) in addPreRegAlloc()
420 if (getOptLevel() != CodeGenOptLevel::None) { in addPostRegAlloc()
432 if (getOptLevel() != CodeGenOptLevel::None) in addPreSched2()
438 bool NoOpt = (getOptLevel() == CodeGenOptLevel::None); in addPreEmitPass()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetMachine.cpp1045 if (TM.getOptLevel() > CodeGenOptLevel::None) in addIRPasses()
1048 if (TM.getOptLevel() > CodeGenOptLevel::None) in addIRPasses()
1128 if (TM->getOptLevel() > CodeGenOptLevel::None) in addPreISel()
1179 if (TM->getOptLevel() > CodeGenOptLevel::None) in addPreISel()
1182 if (TM->getOptLevel() > CodeGenOptLevel::None) in addPreISel()
1205 if (TM->getOptLevel() > CodeGenOptLevel::Less) in addPreISel()
1251 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
1283 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
1435 if (getOptLevel() > CodeGenOptLevel::None) in addPostRegAlloc()
1454 if (getOptLevel() > CodeGenOptLevel::None) in addPreEmitPass()
[all …]
H A DR600TargetMachine.cpp123 addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel())); in addInstSelector()
H A DAMDGPUTargetMachine.h144 if (TM->getOptLevel() < Level)
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp261 return getStandardCSEConfigForOpt(TM->getOptLevel()); in getCSEConfig()
276 addPass(createMips16ISelDag(getMipsTargetMachine(), getOptLevel())); in addInstSelector()
277 addPass(createMipsSEISelDag(getMipsTargetMachine(), getOptLevel())); in addInstSelector()
336 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
350 bool IsOptNone = getOptLevel() == CodeGenOptLevel::None; in addPreRegBankSelect()
360 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
H A DMipsPostLegalizerCombiner.cpp134 MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F); in runOnMachineFunction()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetMachine.cpp307 if (getOptLevel() == CodeGenOptLevel::Aggressive) in addEarlyCSEOrGVNPass()
370 if (getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
378 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
400 if (getOptLevel() != CodeGenOptLevel::None) { in addIRPasses()
417 addPass(createNVPTXISelDag(getNVPTXTargetMachine(), getOptLevel())); in addInstSelector()
432 if (getOptLevel() != CodeGenOptLevel::None) { in addPostRegAlloc()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetMachine.cpp436 if (getOptLevel() != CodeGenOptLevel::None) in addIRPasses()
489 createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel())); in addInstSelector()
513 if (getOptLevel() == CodeGenOptLevel::Less) in addOptimizedRegAlloc()
561 if (getOptLevel() != CodeGenOptLevel::None) { in addPreEmitPass()
596 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFTargetMachine.cpp187 if (getOptLevel() != CodeGenOptLevel::None) in addPreEmitPass()
208 addPass(new InstructionSelect(getOptLevel())); in addGlobalInstructionSelect()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430TargetMachine.cpp93 addPass(createMSP430ISelDag(getMSP430TargetMachine(), getOptLevel())); in addInstSelector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreTargetMachine.cpp98 addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel())); in addInstSelector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCTargetMachine.cpp79 addPass(createARCISelDag(getARCTargetMachine(), getOptLevel())); in addInstSelector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRTargetMachine.cpp122 addPass(createAVRISelDag(getAVRTargetMachine(), getOptLevel())); in addInstSelector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYTargetMachine.cpp126 addPass(createCSKYISelDag(getCSKYTargetMachine(), getOptLevel())); in addInstSelector()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVTargetMachine.cpp180 addPass(new IRTranslator(getOptLevel())); in addIRTranslator()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVPreLegalizerCombiner.cpp143 MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F); in runOnMachineFunction()

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