10b57cec5SDimitry Andric //===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric ///
90b57cec5SDimitry Andric /// \file
100b57cec5SDimitry Andric /// This file defines the WebAssembly-specific subclass of TargetMachine.
110b57cec5SDimitry Andric ///
120b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
130b57cec5SDimitry Andric
140b57cec5SDimitry Andric #include "WebAssemblyTargetMachine.h"
150b57cec5SDimitry Andric #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
160b57cec5SDimitry Andric #include "TargetInfo/WebAssemblyTargetInfo.h"
170b57cec5SDimitry Andric #include "WebAssembly.h"
18fe013be4SDimitry Andric #include "WebAssemblyISelLowering.h"
190b57cec5SDimitry Andric #include "WebAssemblyMachineFunctionInfo.h"
200b57cec5SDimitry Andric #include "WebAssemblyTargetObjectFile.h"
210b57cec5SDimitry Andric #include "WebAssemblyTargetTransformInfo.h"
22*c9157d92SDimitry Andric #include "WebAssemblyUtilities.h"
230b57cec5SDimitry Andric #include "llvm/CodeGen/MIRParser/MIParser.h"
240b57cec5SDimitry Andric #include "llvm/CodeGen/MachineFunctionPass.h"
250b57cec5SDimitry Andric #include "llvm/CodeGen/Passes.h"
260b57cec5SDimitry Andric #include "llvm/CodeGen/RegAllocRegistry.h"
270b57cec5SDimitry Andric #include "llvm/CodeGen/TargetPassConfig.h"
280b57cec5SDimitry Andric #include "llvm/IR/Function.h"
2981ad6265SDimitry Andric #include "llvm/InitializePasses.h"
300eae32dcSDimitry Andric #include "llvm/MC/MCAsmInfo.h"
31349cc55cSDimitry Andric #include "llvm/MC/TargetRegistry.h"
320b57cec5SDimitry Andric #include "llvm/Target/TargetOptions.h"
330b57cec5SDimitry Andric #include "llvm/Transforms/Scalar.h"
3481ad6265SDimitry Andric #include "llvm/Transforms/Scalar/LowerAtomicPass.h"
350b57cec5SDimitry Andric #include "llvm/Transforms/Utils.h"
36bdd1243dSDimitry Andric #include <optional>
370b57cec5SDimitry Andric using namespace llvm;
380b57cec5SDimitry Andric
390b57cec5SDimitry Andric #define DEBUG_TYPE "wasm"
400b57cec5SDimitry Andric
415ffd83dbSDimitry Andric // A command-line option to keep implicit locals
425ffd83dbSDimitry Andric // for the purpose of testing with lit/llc ONLY.
435ffd83dbSDimitry Andric // This produces output which is not valid WebAssembly, and is not supported
445ffd83dbSDimitry Andric // by assemblers/disassemblers and other MC based tools.
455ffd83dbSDimitry Andric static cl::opt<bool> WasmDisableExplicitLocals(
465ffd83dbSDimitry Andric "wasm-disable-explicit-locals", cl::Hidden,
475ffd83dbSDimitry Andric cl::desc("WebAssembly: output implicit locals in"
485ffd83dbSDimitry Andric " instruction output for test purposes only."),
495ffd83dbSDimitry Andric cl::init(false));
505ffd83dbSDimitry Andric
51*c9157d92SDimitry Andric static cl::opt<bool> WasmDisableFixIrreducibleControlFlowPass(
52*c9157d92SDimitry Andric "wasm-disable-fix-irreducible-control-flow-pass", cl::Hidden,
53*c9157d92SDimitry Andric cl::desc("webassembly: disables the fix "
54*c9157d92SDimitry Andric " irreducible control flow optimization pass"),
55*c9157d92SDimitry Andric cl::init(false));
56*c9157d92SDimitry Andric
LLVMInitializeWebAssemblyTarget()57480093f4SDimitry Andric extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeWebAssemblyTarget() {
580b57cec5SDimitry Andric // Register the target.
590b57cec5SDimitry Andric RegisterTargetMachine<WebAssemblyTargetMachine> X(
600b57cec5SDimitry Andric getTheWebAssemblyTarget32());
610b57cec5SDimitry Andric RegisterTargetMachine<WebAssemblyTargetMachine> Y(
620b57cec5SDimitry Andric getTheWebAssemblyTarget64());
630b57cec5SDimitry Andric
640b57cec5SDimitry Andric // Register backend passes
650b57cec5SDimitry Andric auto &PR = *PassRegistry::getPassRegistry();
660b57cec5SDimitry Andric initializeWebAssemblyAddMissingPrototypesPass(PR);
670b57cec5SDimitry Andric initializeWebAssemblyLowerEmscriptenEHSjLjPass(PR);
6881ad6265SDimitry Andric initializeLowerGlobalDtorsLegacyPassPass(PR);
690b57cec5SDimitry Andric initializeFixFunctionBitcastsPass(PR);
700b57cec5SDimitry Andric initializeOptimizeReturnedPass(PR);
710b57cec5SDimitry Andric initializeWebAssemblyArgumentMovePass(PR);
720b57cec5SDimitry Andric initializeWebAssemblySetP2AlignOperandsPass(PR);
730b57cec5SDimitry Andric initializeWebAssemblyReplacePhysRegsPass(PR);
740b57cec5SDimitry Andric initializeWebAssemblyOptimizeLiveIntervalsPass(PR);
750b57cec5SDimitry Andric initializeWebAssemblyMemIntrinsicResultsPass(PR);
760b57cec5SDimitry Andric initializeWebAssemblyRegStackifyPass(PR);
770b57cec5SDimitry Andric initializeWebAssemblyRegColoringPass(PR);
78fe6060f1SDimitry Andric initializeWebAssemblyNullifyDebugValueListsPass(PR);
790b57cec5SDimitry Andric initializeWebAssemblyFixIrreducibleControlFlowPass(PR);
800b57cec5SDimitry Andric initializeWebAssemblyLateEHPreparePass(PR);
810b57cec5SDimitry Andric initializeWebAssemblyExceptionInfoPass(PR);
820b57cec5SDimitry Andric initializeWebAssemblyCFGSortPass(PR);
830b57cec5SDimitry Andric initializeWebAssemblyCFGStackifyPass(PR);
840b57cec5SDimitry Andric initializeWebAssemblyExplicitLocalsPass(PR);
850b57cec5SDimitry Andric initializeWebAssemblyLowerBrUnlessPass(PR);
860b57cec5SDimitry Andric initializeWebAssemblyRegNumberingPass(PR);
875ffd83dbSDimitry Andric initializeWebAssemblyDebugFixupPass(PR);
880b57cec5SDimitry Andric initializeWebAssemblyPeepholePass(PR);
89fe6060f1SDimitry Andric initializeWebAssemblyMCLowerPrePassPass(PR);
90bdd1243dSDimitry Andric initializeWebAssemblyLowerRefTypesIntPtrConvPass(PR);
91bdd1243dSDimitry Andric initializeWebAssemblyFixBrTableDefaultsPass(PR);
92bdd1243dSDimitry Andric initializeWebAssemblyDAGToDAGISelPass(PR);
930b57cec5SDimitry Andric }
940b57cec5SDimitry Andric
950b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
960b57cec5SDimitry Andric // WebAssembly Lowering public interface.
970b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
980b57cec5SDimitry Andric
getEffectiveRelocModel(std::optional<Reloc::Model> RM,const Triple & TT)99bdd1243dSDimitry Andric static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM,
1000b57cec5SDimitry Andric const Triple &TT) {
10181ad6265SDimitry Andric if (!RM) {
1020b57cec5SDimitry Andric // Default to static relocation model. This should always be more optimial
1030b57cec5SDimitry Andric // than PIC since the static linker can determine all global addresses and
1040b57cec5SDimitry Andric // assume direct function calls.
1050b57cec5SDimitry Andric return Reloc::Static;
1060b57cec5SDimitry Andric }
1070b57cec5SDimitry Andric
1080b57cec5SDimitry Andric return *RM;
1090b57cec5SDimitry Andric }
1100b57cec5SDimitry Andric
1110b57cec5SDimitry Andric /// Create an WebAssembly architecture model.
1120b57cec5SDimitry Andric ///
WebAssemblyTargetMachine(const Target & T,const Triple & TT,StringRef CPU,StringRef FS,const TargetOptions & Options,std::optional<Reloc::Model> RM,std::optional<CodeModel::Model> CM,CodeGenOptLevel OL,bool JIT)1130b57cec5SDimitry Andric WebAssemblyTargetMachine::WebAssemblyTargetMachine(
1140b57cec5SDimitry Andric const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
115bdd1243dSDimitry Andric const TargetOptions &Options, std::optional<Reloc::Model> RM,
116*c9157d92SDimitry Andric std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT)
117fe6060f1SDimitry Andric : LLVMTargetMachine(
118fe6060f1SDimitry Andric T,
119fe6060f1SDimitry Andric TT.isArch64Bit()
120349cc55cSDimitry Andric ? (TT.isOSEmscripten() ? "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
121349cc55cSDimitry Andric "f128:64-n32:64-S128-ni:1:10:20"
122349cc55cSDimitry Andric : "e-m:e-p:64:64-p10:8:8-p20:8:8-i64:64-"
123349cc55cSDimitry Andric "n32:64-S128-ni:1:10:20")
124349cc55cSDimitry Andric : (TT.isOSEmscripten() ? "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
125349cc55cSDimitry Andric "f128:64-n32:64-S128-ni:1:10:20"
126349cc55cSDimitry Andric : "e-m:e-p:32:32-p10:8:8-p20:8:8-i64:64-"
127349cc55cSDimitry Andric "n32:64-S128-ni:1:10:20"),
1280b57cec5SDimitry Andric TT, CPU, FS, Options, getEffectiveRelocModel(RM, TT),
1290b57cec5SDimitry Andric getEffectiveCodeModel(CM, CodeModel::Large), OL),
1300b57cec5SDimitry Andric TLOF(new WebAssemblyTargetObjectFile()) {
1310b57cec5SDimitry Andric // WebAssembly type-checks instructions, but a noreturn function with a return
1320b57cec5SDimitry Andric // type that doesn't match the context will cause a check failure. So we lower
1330b57cec5SDimitry Andric // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
1340b57cec5SDimitry Andric // 'unreachable' instructions which is meant for that case.
1350b57cec5SDimitry Andric this->Options.TrapUnreachable = true;
136*c9157d92SDimitry Andric this->Options.NoTrapAfterNoreturn = false;
1370b57cec5SDimitry Andric
1380b57cec5SDimitry Andric // WebAssembly treats each function as an independent unit. Force
1390b57cec5SDimitry Andric // -ffunction-sections, effectively, so that we can emit them independently.
1400b57cec5SDimitry Andric this->Options.FunctionSections = true;
1410b57cec5SDimitry Andric this->Options.DataSections = true;
1420b57cec5SDimitry Andric this->Options.UniqueSectionNames = true;
1430b57cec5SDimitry Andric
1440b57cec5SDimitry Andric initAsmInfo();
1450b57cec5SDimitry Andric
1460b57cec5SDimitry Andric // Note that we don't use setRequiresStructuredCFG(true). It disables
1470b57cec5SDimitry Andric // optimizations than we're ok with, and want, such as critical edge
1480b57cec5SDimitry Andric // splitting and tail merging.
1490b57cec5SDimitry Andric }
1500b57cec5SDimitry Andric
1510b57cec5SDimitry Andric WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
1520b57cec5SDimitry Andric
getSubtargetImpl() const153e8d8bef9SDimitry Andric const WebAssemblySubtarget *WebAssemblyTargetMachine::getSubtargetImpl() const {
154e8d8bef9SDimitry Andric return getSubtargetImpl(std::string(getTargetCPU()),
155e8d8bef9SDimitry Andric std::string(getTargetFeatureString()));
156e8d8bef9SDimitry Andric }
157e8d8bef9SDimitry Andric
1580b57cec5SDimitry Andric const WebAssemblySubtarget *
getSubtargetImpl(std::string CPU,std::string FS) const1590b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(std::string CPU,
1600b57cec5SDimitry Andric std::string FS) const {
1610b57cec5SDimitry Andric auto &I = SubtargetMap[CPU + FS];
1620b57cec5SDimitry Andric if (!I) {
1638bcb0991SDimitry Andric I = std::make_unique<WebAssemblySubtarget>(TargetTriple, CPU, FS, *this);
1640b57cec5SDimitry Andric }
1650b57cec5SDimitry Andric return I.get();
1660b57cec5SDimitry Andric }
1670b57cec5SDimitry Andric
1680b57cec5SDimitry Andric const WebAssemblySubtarget *
getSubtargetImpl(const Function & F) const1690b57cec5SDimitry Andric WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
1700b57cec5SDimitry Andric Attribute CPUAttr = F.getFnAttribute("target-cpu");
1710b57cec5SDimitry Andric Attribute FSAttr = F.getFnAttribute("target-features");
1720b57cec5SDimitry Andric
173e8d8bef9SDimitry Andric std::string CPU =
174e8d8bef9SDimitry Andric CPUAttr.isValid() ? CPUAttr.getValueAsString().str() : TargetCPU;
175e8d8bef9SDimitry Andric std::string FS =
176e8d8bef9SDimitry Andric FSAttr.isValid() ? FSAttr.getValueAsString().str() : TargetFS;
1770b57cec5SDimitry Andric
1780b57cec5SDimitry Andric // This needs to be done before we create a new subtarget since any
1790b57cec5SDimitry Andric // creation will depend on the TM and the code generation flags on the
1800b57cec5SDimitry Andric // function that reside in TargetOptions.
1810b57cec5SDimitry Andric resetTargetOptions(F);
1820b57cec5SDimitry Andric
1830b57cec5SDimitry Andric return getSubtargetImpl(CPU, FS);
1840b57cec5SDimitry Andric }
1850b57cec5SDimitry Andric
1860b57cec5SDimitry Andric namespace {
1870b57cec5SDimitry Andric
1880b57cec5SDimitry Andric class CoalesceFeaturesAndStripAtomics final : public ModulePass {
1890b57cec5SDimitry Andric // Take the union of all features used in the module and use it for each
1900b57cec5SDimitry Andric // function individually, since having multiple feature sets in one module
1910b57cec5SDimitry Andric // currently does not make sense for WebAssembly. If atomics are not enabled,
1920b57cec5SDimitry Andric // also strip atomic operations and thread local storage.
1930b57cec5SDimitry Andric static char ID;
1940b57cec5SDimitry Andric WebAssemblyTargetMachine *WasmTM;
1950b57cec5SDimitry Andric
1960b57cec5SDimitry Andric public:
CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine * WasmTM)1970b57cec5SDimitry Andric CoalesceFeaturesAndStripAtomics(WebAssemblyTargetMachine *WasmTM)
1980b57cec5SDimitry Andric : ModulePass(ID), WasmTM(WasmTM) {}
1990b57cec5SDimitry Andric
runOnModule(Module & M)2000b57cec5SDimitry Andric bool runOnModule(Module &M) override {
2010b57cec5SDimitry Andric FeatureBitset Features = coalesceFeatures(M);
2020b57cec5SDimitry Andric
2030b57cec5SDimitry Andric std::string FeatureStr = getFeatureString(Features);
204e8d8bef9SDimitry Andric WasmTM->setTargetFeatureString(FeatureStr);
2050b57cec5SDimitry Andric for (auto &F : M)
2060b57cec5SDimitry Andric replaceFeatures(F, FeatureStr);
2070b57cec5SDimitry Andric
2080b57cec5SDimitry Andric bool StrippedAtomics = false;
2090b57cec5SDimitry Andric bool StrippedTLS = false;
2100b57cec5SDimitry Andric
21181ad6265SDimitry Andric if (!Features[WebAssembly::FeatureAtomics]) {
2120b57cec5SDimitry Andric StrippedAtomics = stripAtomics(M);
2130b57cec5SDimitry Andric StrippedTLS = stripThreadLocals(M);
21481ad6265SDimitry Andric } else if (!Features[WebAssembly::FeatureBulkMemory]) {
21581ad6265SDimitry Andric StrippedTLS |= stripThreadLocals(M);
21681ad6265SDimitry Andric }
2170b57cec5SDimitry Andric
2180b57cec5SDimitry Andric if (StrippedAtomics && !StrippedTLS)
2190b57cec5SDimitry Andric stripThreadLocals(M);
2200b57cec5SDimitry Andric else if (StrippedTLS && !StrippedAtomics)
2210b57cec5SDimitry Andric stripAtomics(M);
2220b57cec5SDimitry Andric
2230b57cec5SDimitry Andric recordFeatures(M, Features, StrippedAtomics || StrippedTLS);
2240b57cec5SDimitry Andric
2250b57cec5SDimitry Andric // Conservatively assume we have made some change
2260b57cec5SDimitry Andric return true;
2270b57cec5SDimitry Andric }
2280b57cec5SDimitry Andric
2290b57cec5SDimitry Andric private:
coalesceFeatures(const Module & M)2300b57cec5SDimitry Andric FeatureBitset coalesceFeatures(const Module &M) {
2310b57cec5SDimitry Andric FeatureBitset Features =
2320b57cec5SDimitry Andric WasmTM
2335ffd83dbSDimitry Andric ->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
2345ffd83dbSDimitry Andric std::string(WasmTM->getTargetFeatureString()))
2350b57cec5SDimitry Andric ->getFeatureBits();
2360b57cec5SDimitry Andric for (auto &F : M)
2370b57cec5SDimitry Andric Features |= WasmTM->getSubtargetImpl(F)->getFeatureBits();
2380b57cec5SDimitry Andric return Features;
2390b57cec5SDimitry Andric }
2400b57cec5SDimitry Andric
getFeatureString(const FeatureBitset & Features)2410b57cec5SDimitry Andric std::string getFeatureString(const FeatureBitset &Features) {
2420b57cec5SDimitry Andric std::string Ret;
2430b57cec5SDimitry Andric for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
2440b57cec5SDimitry Andric if (Features[KV.Value])
2450b57cec5SDimitry Andric Ret += (StringRef("+") + KV.Key + ",").str();
2460b57cec5SDimitry Andric }
2470b57cec5SDimitry Andric return Ret;
2480b57cec5SDimitry Andric }
2490b57cec5SDimitry Andric
replaceFeatures(Function & F,const std::string & Features)2500b57cec5SDimitry Andric void replaceFeatures(Function &F, const std::string &Features) {
2510b57cec5SDimitry Andric F.removeFnAttr("target-features");
2520b57cec5SDimitry Andric F.removeFnAttr("target-cpu");
2530b57cec5SDimitry Andric F.addFnAttr("target-features", Features);
2540b57cec5SDimitry Andric }
2550b57cec5SDimitry Andric
stripAtomics(Module & M)2560b57cec5SDimitry Andric bool stripAtomics(Module &M) {
2570b57cec5SDimitry Andric // Detect whether any atomics will be lowered, since there is no way to tell
2580b57cec5SDimitry Andric // whether the LowerAtomic pass lowers e.g. stores.
2590b57cec5SDimitry Andric bool Stripped = false;
2600b57cec5SDimitry Andric for (auto &F : M) {
2610b57cec5SDimitry Andric for (auto &B : F) {
2620b57cec5SDimitry Andric for (auto &I : B) {
2630b57cec5SDimitry Andric if (I.isAtomic()) {
2640b57cec5SDimitry Andric Stripped = true;
2650b57cec5SDimitry Andric goto done;
2660b57cec5SDimitry Andric }
2670b57cec5SDimitry Andric }
2680b57cec5SDimitry Andric }
2690b57cec5SDimitry Andric }
2700b57cec5SDimitry Andric
2710b57cec5SDimitry Andric done:
2720b57cec5SDimitry Andric if (!Stripped)
2730b57cec5SDimitry Andric return false;
2740b57cec5SDimitry Andric
2750b57cec5SDimitry Andric LowerAtomicPass Lowerer;
2760b57cec5SDimitry Andric FunctionAnalysisManager FAM;
2770b57cec5SDimitry Andric for (auto &F : M)
2780b57cec5SDimitry Andric Lowerer.run(F, FAM);
2790b57cec5SDimitry Andric
2800b57cec5SDimitry Andric return true;
2810b57cec5SDimitry Andric }
2820b57cec5SDimitry Andric
stripThreadLocals(Module & M)2830b57cec5SDimitry Andric bool stripThreadLocals(Module &M) {
2840b57cec5SDimitry Andric bool Stripped = false;
2850b57cec5SDimitry Andric for (auto &GV : M.globals()) {
286e8d8bef9SDimitry Andric if (GV.isThreadLocal()) {
2870b57cec5SDimitry Andric Stripped = true;
288e8d8bef9SDimitry Andric GV.setThreadLocal(false);
2890b57cec5SDimitry Andric }
2900b57cec5SDimitry Andric }
2910b57cec5SDimitry Andric return Stripped;
2920b57cec5SDimitry Andric }
2930b57cec5SDimitry Andric
recordFeatures(Module & M,const FeatureBitset & Features,bool Stripped)2940b57cec5SDimitry Andric void recordFeatures(Module &M, const FeatureBitset &Features, bool Stripped) {
2950b57cec5SDimitry Andric for (const SubtargetFeatureKV &KV : WebAssemblyFeatureKV) {
2965ffd83dbSDimitry Andric if (Features[KV.Value]) {
2975ffd83dbSDimitry Andric // Mark features as used
2980b57cec5SDimitry Andric std::string MDKey = (StringRef("wasm-feature-") + KV.Key).str();
2990b57cec5SDimitry Andric M.addModuleFlag(Module::ModFlagBehavior::Error, MDKey,
3000b57cec5SDimitry Andric wasm::WASM_FEATURE_PREFIX_USED);
3010b57cec5SDimitry Andric }
3020b57cec5SDimitry Andric }
3035ffd83dbSDimitry Andric // Code compiled without atomics or bulk-memory may have had its atomics or
3045ffd83dbSDimitry Andric // thread-local data lowered to nonatomic operations or non-thread-local
3055ffd83dbSDimitry Andric // data. In that case, we mark the pseudo-feature "shared-mem" as disallowed
3065ffd83dbSDimitry Andric // to tell the linker that it would be unsafe to allow this code ot be used
3075ffd83dbSDimitry Andric // in a module with shared memory.
3085ffd83dbSDimitry Andric if (Stripped) {
3095ffd83dbSDimitry Andric M.addModuleFlag(Module::ModFlagBehavior::Error, "wasm-feature-shared-mem",
3105ffd83dbSDimitry Andric wasm::WASM_FEATURE_PREFIX_DISALLOWED);
3115ffd83dbSDimitry Andric }
3120b57cec5SDimitry Andric }
3130b57cec5SDimitry Andric };
3140b57cec5SDimitry Andric char CoalesceFeaturesAndStripAtomics::ID = 0;
3150b57cec5SDimitry Andric
3160b57cec5SDimitry Andric /// WebAssembly Code Generator Pass Configuration Options.
3170b57cec5SDimitry Andric class WebAssemblyPassConfig final : public TargetPassConfig {
3180b57cec5SDimitry Andric public:
WebAssemblyPassConfig(WebAssemblyTargetMachine & TM,PassManagerBase & PM)3190b57cec5SDimitry Andric WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
3200b57cec5SDimitry Andric : TargetPassConfig(TM, PM) {}
3210b57cec5SDimitry Andric
getWebAssemblyTargetMachine() const3220b57cec5SDimitry Andric WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
3230b57cec5SDimitry Andric return getTM<WebAssemblyTargetMachine>();
3240b57cec5SDimitry Andric }
3250b57cec5SDimitry Andric
3260b57cec5SDimitry Andric FunctionPass *createTargetRegisterAllocator(bool) override;
3270b57cec5SDimitry Andric
3280b57cec5SDimitry Andric void addIRPasses() override;
32981ad6265SDimitry Andric void addISelPrepare() override;
3300b57cec5SDimitry Andric bool addInstSelector() override;
331bdd1243dSDimitry Andric void addOptimizedRegAlloc() override;
3320b57cec5SDimitry Andric void addPostRegAlloc() override;
addGCPasses()3330b57cec5SDimitry Andric bool addGCPasses() override { return false; }
3340b57cec5SDimitry Andric void addPreEmitPass() override;
335349cc55cSDimitry Andric bool addPreISel() override;
3360b57cec5SDimitry Andric
3370b57cec5SDimitry Andric // No reg alloc
addRegAssignAndRewriteFast()338e8d8bef9SDimitry Andric bool addRegAssignAndRewriteFast() override { return false; }
3390b57cec5SDimitry Andric
3400b57cec5SDimitry Andric // No reg alloc
addRegAssignAndRewriteOptimized()341e8d8bef9SDimitry Andric bool addRegAssignAndRewriteOptimized() override { return false; }
3420b57cec5SDimitry Andric };
3430b57cec5SDimitry Andric } // end anonymous namespace
3440b57cec5SDimitry Andric
createMachineFunctionInfo(BumpPtrAllocator & Allocator,const Function & F,const TargetSubtargetInfo * STI) const345bdd1243dSDimitry Andric MachineFunctionInfo *WebAssemblyTargetMachine::createMachineFunctionInfo(
346bdd1243dSDimitry Andric BumpPtrAllocator &Allocator, const Function &F,
347bdd1243dSDimitry Andric const TargetSubtargetInfo *STI) const {
348bdd1243dSDimitry Andric return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
349bdd1243dSDimitry Andric STI);
350bdd1243dSDimitry Andric }
351bdd1243dSDimitry Andric
3520b57cec5SDimitry Andric TargetTransformInfo
getTargetTransformInfo(const Function & F) const35381ad6265SDimitry Andric WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) const {
3540b57cec5SDimitry Andric return TargetTransformInfo(WebAssemblyTTIImpl(this, F));
3550b57cec5SDimitry Andric }
3560b57cec5SDimitry Andric
3570b57cec5SDimitry Andric TargetPassConfig *
createPassConfig(PassManagerBase & PM)3580b57cec5SDimitry Andric WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
3590b57cec5SDimitry Andric return new WebAssemblyPassConfig(*this, PM);
3600b57cec5SDimitry Andric }
3610b57cec5SDimitry Andric
createTargetRegisterAllocator(bool)3620b57cec5SDimitry Andric FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
3630b57cec5SDimitry Andric return nullptr; // No reg alloc
3640b57cec5SDimitry Andric }
3650b57cec5SDimitry Andric
3660eae32dcSDimitry Andric using WebAssembly::WasmEnableEH;
3670eae32dcSDimitry Andric using WebAssembly::WasmEnableEmEH;
3680eae32dcSDimitry Andric using WebAssembly::WasmEnableEmSjLj;
3690eae32dcSDimitry Andric using WebAssembly::WasmEnableSjLj;
3700eae32dcSDimitry Andric
basicCheckForEHAndSjLj(TargetMachine * TM)3710eae32dcSDimitry Andric static void basicCheckForEHAndSjLj(TargetMachine *TM) {
3720eae32dcSDimitry Andric // Before checking, we make sure TargetOptions.ExceptionModel is the same as
3730eae32dcSDimitry Andric // MCAsmInfo.ExceptionsType. Normally these have to be the same, because clang
3740eae32dcSDimitry Andric // stores the exception model info in LangOptions, which is later transferred
3750eae32dcSDimitry Andric // to TargetOptions and MCAsmInfo. But when clang compiles bitcode directly,
3760eae32dcSDimitry Andric // clang's LangOptions is not used and thus the exception model info is not
3770eae32dcSDimitry Andric // correctly transferred to TargetOptions and MCAsmInfo, so we make sure we
378*c9157d92SDimitry Andric // have the correct exception model in WebAssemblyMCAsmInfo constructor.
3790eae32dcSDimitry Andric // But in this case TargetOptions is still not updated, so we make sure they
3800eae32dcSDimitry Andric // are the same.
3810eae32dcSDimitry Andric TM->Options.ExceptionModel = TM->getMCAsmInfo()->getExceptionHandlingType();
3820eae32dcSDimitry Andric
3834824e7fdSDimitry Andric // Basic Correctness checking related to -exception-model
384349cc55cSDimitry Andric if (TM->Options.ExceptionModel != ExceptionHandling::None &&
385349cc55cSDimitry Andric TM->Options.ExceptionModel != ExceptionHandling::Wasm)
386349cc55cSDimitry Andric report_fatal_error("-exception-model should be either 'none' or 'wasm'");
387349cc55cSDimitry Andric if (WasmEnableEmEH && TM->Options.ExceptionModel == ExceptionHandling::Wasm)
388349cc55cSDimitry Andric report_fatal_error("-exception-model=wasm not allowed with "
389349cc55cSDimitry Andric "-enable-emscripten-cxx-exceptions");
390349cc55cSDimitry Andric if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
391349cc55cSDimitry Andric report_fatal_error(
392349cc55cSDimitry Andric "-wasm-enable-eh only allowed with -exception-model=wasm");
393349cc55cSDimitry Andric if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
394349cc55cSDimitry Andric report_fatal_error(
395349cc55cSDimitry Andric "-wasm-enable-sjlj only allowed with -exception-model=wasm");
396349cc55cSDimitry Andric if ((!WasmEnableEH && !WasmEnableSjLj) &&
397349cc55cSDimitry Andric TM->Options.ExceptionModel == ExceptionHandling::Wasm)
398349cc55cSDimitry Andric report_fatal_error(
399349cc55cSDimitry Andric "-exception-model=wasm only allowed with at least one of "
400349cc55cSDimitry Andric "-wasm-enable-eh or -wasm-enable-sjj");
401349cc55cSDimitry Andric
402349cc55cSDimitry Andric // You can't enable two modes of EH at the same time
403349cc55cSDimitry Andric if (WasmEnableEmEH && WasmEnableEH)
404349cc55cSDimitry Andric report_fatal_error(
405349cc55cSDimitry Andric "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-eh");
406349cc55cSDimitry Andric // You can't enable two modes of SjLj at the same time
407349cc55cSDimitry Andric if (WasmEnableEmSjLj && WasmEnableSjLj)
408349cc55cSDimitry Andric report_fatal_error(
409349cc55cSDimitry Andric "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
410349cc55cSDimitry Andric // You can't mix Emscripten EH with Wasm SjLj.
411349cc55cSDimitry Andric if (WasmEnableEmEH && WasmEnableSjLj)
412349cc55cSDimitry Andric report_fatal_error(
413349cc55cSDimitry Andric "-enable-emscripten-cxx-exceptions not allowed with -wasm-enable-sjlj");
414349cc55cSDimitry Andric // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
415349cc55cSDimitry Andric // measure, but some code will error out at compile time in this combination.
416349cc55cSDimitry Andric // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
417349cc55cSDimitry Andric }
418349cc55cSDimitry Andric
4190b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
4200b57cec5SDimitry Andric // The following functions are called from lib/CodeGen/Passes.cpp to modify
4210b57cec5SDimitry Andric // the CodeGen pass sequence.
4220b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
4230b57cec5SDimitry Andric
addIRPasses()4240b57cec5SDimitry Andric void WebAssemblyPassConfig::addIRPasses() {
4250b57cec5SDimitry Andric // Add signatures to prototype-less function declarations
4260b57cec5SDimitry Andric addPass(createWebAssemblyAddMissingPrototypes());
4270b57cec5SDimitry Andric
428bdd1243dSDimitry Andric // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
42981ad6265SDimitry Andric addPass(createLowerGlobalDtorsLegacyPass());
4300b57cec5SDimitry Andric
4310b57cec5SDimitry Andric // Fix function bitcasts, as WebAssembly requires caller and callee signatures
4320b57cec5SDimitry Andric // to match.
4330b57cec5SDimitry Andric addPass(createWebAssemblyFixFunctionBitcasts());
4340b57cec5SDimitry Andric
4350b57cec5SDimitry Andric // Optimize "returned" function attributes.
436*c9157d92SDimitry Andric if (getOptLevel() != CodeGenOptLevel::None)
4370b57cec5SDimitry Andric addPass(createWebAssemblyOptimizeReturned());
4380b57cec5SDimitry Andric
4394824e7fdSDimitry Andric basicCheckForEHAndSjLj(TM);
440349cc55cSDimitry Andric
4410b57cec5SDimitry Andric // If exception handling is not enabled and setjmp/longjmp handling is
4420b57cec5SDimitry Andric // enabled, we lower invokes into calls and delete unreachable landingpad
4430b57cec5SDimitry Andric // blocks. Lowering invokes when there is no EH support is done in
444349cc55cSDimitry Andric // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
445349cc55cSDimitry Andric // passes and Emscripten SjLj handling expects all invokes to be lowered
446349cc55cSDimitry Andric // before.
447349cc55cSDimitry Andric if (!WasmEnableEmEH && !WasmEnableEH) {
4480b57cec5SDimitry Andric addPass(createLowerInvokePass());
4490b57cec5SDimitry Andric // The lower invoke pass may create unreachable code. Remove it in order not
4500b57cec5SDimitry Andric // to process dead blocks in setjmp/longjmp handling.
4510b57cec5SDimitry Andric addPass(createUnreachableBlockEliminationPass());
4520b57cec5SDimitry Andric }
4530b57cec5SDimitry Andric
454349cc55cSDimitry Andric // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
455349cc55cSDimitry Andric // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
456349cc55cSDimitry Andric // transformation algorithms with Emscripten SjLj, so we run
457349cc55cSDimitry Andric // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
458349cc55cSDimitry Andric if (WasmEnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
459349cc55cSDimitry Andric addPass(createWebAssemblyLowerEmscriptenEHSjLj());
4600b57cec5SDimitry Andric
4610b57cec5SDimitry Andric // Expand indirectbr instructions to switches.
4620b57cec5SDimitry Andric addPass(createIndirectBrExpandPass());
4630b57cec5SDimitry Andric
4640b57cec5SDimitry Andric TargetPassConfig::addIRPasses();
4650b57cec5SDimitry Andric }
4660b57cec5SDimitry Andric
addISelPrepare()46781ad6265SDimitry Andric void WebAssemblyPassConfig::addISelPrepare() {
468fe013be4SDimitry Andric WebAssemblyTargetMachine *WasmTM =
469fe013be4SDimitry Andric static_cast<WebAssemblyTargetMachine *>(TM);
470fe013be4SDimitry Andric const WebAssemblySubtarget *Subtarget =
471fe013be4SDimitry Andric WasmTM->getSubtargetImpl(std::string(WasmTM->getTargetCPU()),
472fe013be4SDimitry Andric std::string(WasmTM->getTargetFeatureString()));
473fe013be4SDimitry Andric if (Subtarget->hasReferenceTypes()) {
474fe013be4SDimitry Andric // We need to remove allocas for reference types
475fe013be4SDimitry Andric addPass(createPromoteMemoryToRegisterPass(true));
476fe013be4SDimitry Andric }
47781ad6265SDimitry Andric // Lower atomics and TLS if necessary
47881ad6265SDimitry Andric addPass(new CoalesceFeaturesAndStripAtomics(&getWebAssemblyTargetMachine()));
47981ad6265SDimitry Andric
48081ad6265SDimitry Andric // This is a no-op if atomics are not used in the module
48181ad6265SDimitry Andric addPass(createAtomicExpandPass());
48281ad6265SDimitry Andric
48381ad6265SDimitry Andric TargetPassConfig::addISelPrepare();
48481ad6265SDimitry Andric }
48581ad6265SDimitry Andric
addInstSelector()4860b57cec5SDimitry Andric bool WebAssemblyPassConfig::addInstSelector() {
4870b57cec5SDimitry Andric (void)TargetPassConfig::addInstSelector();
4880b57cec5SDimitry Andric addPass(
4890b57cec5SDimitry Andric createWebAssemblyISelDag(getWebAssemblyTargetMachine(), getOptLevel()));
4900b57cec5SDimitry Andric // Run the argument-move pass immediately after the ScheduleDAG scheduler
4910b57cec5SDimitry Andric // so that we can fix up the ARGUMENT instructions before anything else
4920b57cec5SDimitry Andric // sees them in the wrong place.
4930b57cec5SDimitry Andric addPass(createWebAssemblyArgumentMove());
4940b57cec5SDimitry Andric // Set the p2align operands. This information is present during ISel, however
4950b57cec5SDimitry Andric // it's inconvenient to collect. Collect it now, and update the immediate
4960b57cec5SDimitry Andric // operands.
4970b57cec5SDimitry Andric addPass(createWebAssemblySetP2AlignOperands());
4985ffd83dbSDimitry Andric
4995ffd83dbSDimitry Andric // Eliminate range checks and add default targets to br_table instructions.
5005ffd83dbSDimitry Andric addPass(createWebAssemblyFixBrTableDefaults());
5015ffd83dbSDimitry Andric
5020b57cec5SDimitry Andric return false;
5030b57cec5SDimitry Andric }
5040b57cec5SDimitry Andric
addOptimizedRegAlloc()505bdd1243dSDimitry Andric void WebAssemblyPassConfig::addOptimizedRegAlloc() {
506bdd1243dSDimitry Andric // Currently RegisterCoalesce degrades wasm debug info quality by a
507bdd1243dSDimitry Andric // significant margin. As a quick fix, disable this for -O1, which is often
508bdd1243dSDimitry Andric // used for debugging large applications. Disabling this increases code size
509bdd1243dSDimitry Andric // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
510bdd1243dSDimitry Andric // usually not used for production builds.
511bdd1243dSDimitry Andric // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
512bdd1243dSDimitry Andric // it properly
513*c9157d92SDimitry Andric if (getOptLevel() == CodeGenOptLevel::Less)
514bdd1243dSDimitry Andric disablePass(&RegisterCoalescerID);
515bdd1243dSDimitry Andric TargetPassConfig::addOptimizedRegAlloc();
516bdd1243dSDimitry Andric }
517bdd1243dSDimitry Andric
addPostRegAlloc()5180b57cec5SDimitry Andric void WebAssemblyPassConfig::addPostRegAlloc() {
5190b57cec5SDimitry Andric // TODO: The following CodeGen passes don't currently support code containing
5200b57cec5SDimitry Andric // virtual registers. Consider removing their restrictions and re-enabling
5210b57cec5SDimitry Andric // them.
5220b57cec5SDimitry Andric
5230b57cec5SDimitry Andric // These functions all require the NoVRegs property.
524bdd1243dSDimitry Andric disablePass(&MachineLateInstrsCleanupID);
5250b57cec5SDimitry Andric disablePass(&MachineCopyPropagationID);
5260b57cec5SDimitry Andric disablePass(&PostRAMachineSinkingID);
5270b57cec5SDimitry Andric disablePass(&PostRASchedulerID);
5280b57cec5SDimitry Andric disablePass(&FuncletLayoutID);
5290b57cec5SDimitry Andric disablePass(&StackMapLivenessID);
5300b57cec5SDimitry Andric disablePass(&PatchableFunctionID);
5310b57cec5SDimitry Andric disablePass(&ShrinkWrapID);
5320b57cec5SDimitry Andric
5330b57cec5SDimitry Andric // This pass hurts code size for wasm because it can generate irreducible
5340b57cec5SDimitry Andric // control flow.
5350b57cec5SDimitry Andric disablePass(&MachineBlockPlacementID);
5360b57cec5SDimitry Andric
5370b57cec5SDimitry Andric TargetPassConfig::addPostRegAlloc();
5380b57cec5SDimitry Andric }
5390b57cec5SDimitry Andric
addPreEmitPass()5400b57cec5SDimitry Andric void WebAssemblyPassConfig::addPreEmitPass() {
5410b57cec5SDimitry Andric TargetPassConfig::addPreEmitPass();
5420b57cec5SDimitry Andric
543fe6060f1SDimitry Andric // Nullify DBG_VALUE_LISTs that we cannot handle.
544fe6060f1SDimitry Andric addPass(createWebAssemblyNullifyDebugValueLists());
545fe6060f1SDimitry Andric
5460b57cec5SDimitry Andric // Eliminate multiple-entry loops.
547*c9157d92SDimitry Andric if (!WasmDisableFixIrreducibleControlFlowPass)
5480b57cec5SDimitry Andric addPass(createWebAssemblyFixIrreducibleControlFlow());
5490b57cec5SDimitry Andric
5500b57cec5SDimitry Andric // Do various transformations for exception handling.
5510b57cec5SDimitry Andric // Every CFG-changing optimizations should come before this.
552e8d8bef9SDimitry Andric if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
5530b57cec5SDimitry Andric addPass(createWebAssemblyLateEHPrepare());
5540b57cec5SDimitry Andric
5550b57cec5SDimitry Andric // Now that we have a prologue and epilogue and all frame indices are
5560b57cec5SDimitry Andric // rewritten, eliminate SP and FP. This allows them to be stackified,
5570b57cec5SDimitry Andric // colored, and numbered with the rest of the registers.
5580b57cec5SDimitry Andric addPass(createWebAssemblyReplacePhysRegs());
5590b57cec5SDimitry Andric
5600b57cec5SDimitry Andric // Preparations and optimizations related to register stackification.
561*c9157d92SDimitry Andric if (getOptLevel() != CodeGenOptLevel::None) {
5620b57cec5SDimitry Andric // Depend on LiveIntervals and perform some optimizations on it.
5630b57cec5SDimitry Andric addPass(createWebAssemblyOptimizeLiveIntervals());
5640b57cec5SDimitry Andric
5650b57cec5SDimitry Andric // Prepare memory intrinsic calls for register stackifying.
5660b57cec5SDimitry Andric addPass(createWebAssemblyMemIntrinsicResults());
5670b57cec5SDimitry Andric
5680b57cec5SDimitry Andric // Mark registers as representing wasm's value stack. This is a key
5690b57cec5SDimitry Andric // code-compression technique in WebAssembly. We run this pass (and
5700b57cec5SDimitry Andric // MemIntrinsicResults above) very late, so that it sees as much code as
5710b57cec5SDimitry Andric // possible, including code emitted by PEI and expanded by late tail
5720b57cec5SDimitry Andric // duplication.
5730b57cec5SDimitry Andric addPass(createWebAssemblyRegStackify());
5740b57cec5SDimitry Andric
5750b57cec5SDimitry Andric // Run the register coloring pass to reduce the total number of registers.
5760b57cec5SDimitry Andric // This runs after stackification so that it doesn't consider registers
5770b57cec5SDimitry Andric // that become stackified.
5780b57cec5SDimitry Andric addPass(createWebAssemblyRegColoring());
5790b57cec5SDimitry Andric }
5800b57cec5SDimitry Andric
5810b57cec5SDimitry Andric // Sort the blocks of the CFG into topological order, a prerequisite for
5820b57cec5SDimitry Andric // BLOCK and LOOP markers.
5830b57cec5SDimitry Andric addPass(createWebAssemblyCFGSort());
5840b57cec5SDimitry Andric
5850b57cec5SDimitry Andric // Insert BLOCK and LOOP markers.
5860b57cec5SDimitry Andric addPass(createWebAssemblyCFGStackify());
5870b57cec5SDimitry Andric
5880b57cec5SDimitry Andric // Insert explicit local.get and local.set operators.
5895ffd83dbSDimitry Andric if (!WasmDisableExplicitLocals)
5900b57cec5SDimitry Andric addPass(createWebAssemblyExplicitLocals());
5910b57cec5SDimitry Andric
5920b57cec5SDimitry Andric // Lower br_unless into br_if.
5930b57cec5SDimitry Andric addPass(createWebAssemblyLowerBrUnless());
5940b57cec5SDimitry Andric
5950b57cec5SDimitry Andric // Perform the very last peephole optimizations on the code.
596*c9157d92SDimitry Andric if (getOptLevel() != CodeGenOptLevel::None)
5970b57cec5SDimitry Andric addPass(createWebAssemblyPeephole());
5980b57cec5SDimitry Andric
5990b57cec5SDimitry Andric // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
6000b57cec5SDimitry Andric addPass(createWebAssemblyRegNumbering());
6015ffd83dbSDimitry Andric
6025ffd83dbSDimitry Andric // Fix debug_values whose defs have been stackified.
6035ffd83dbSDimitry Andric if (!WasmDisableExplicitLocals)
6045ffd83dbSDimitry Andric addPass(createWebAssemblyDebugFixup());
605fe6060f1SDimitry Andric
606fe6060f1SDimitry Andric // Collect information to prepare for MC lowering / asm printing.
607fe6060f1SDimitry Andric addPass(createWebAssemblyMCLowerPrePass());
6080b57cec5SDimitry Andric }
6090b57cec5SDimitry Andric
addPreISel()610349cc55cSDimitry Andric bool WebAssemblyPassConfig::addPreISel() {
611349cc55cSDimitry Andric TargetPassConfig::addPreISel();
612349cc55cSDimitry Andric addPass(createWebAssemblyLowerRefTypesIntPtrConv());
613349cc55cSDimitry Andric return false;
614349cc55cSDimitry Andric }
615349cc55cSDimitry Andric
6160b57cec5SDimitry Andric yaml::MachineFunctionInfo *
createDefaultFuncInfoYAML() const6170b57cec5SDimitry Andric WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
6180b57cec5SDimitry Andric return new yaml::WebAssemblyFunctionInfo();
6190b57cec5SDimitry Andric }
6200b57cec5SDimitry Andric
convertFuncInfoToYAML(const MachineFunction & MF) const6210b57cec5SDimitry Andric yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
6220b57cec5SDimitry Andric const MachineFunction &MF) const {
6230b57cec5SDimitry Andric const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
624bdd1243dSDimitry Andric return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
6250b57cec5SDimitry Andric }
6260b57cec5SDimitry Andric
parseMachineFunctionInfo(const yaml::MachineFunctionInfo & MFI,PerFunctionMIParsingState & PFS,SMDiagnostic & Error,SMRange & SourceRange) const6270b57cec5SDimitry Andric bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
6280b57cec5SDimitry Andric const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
6290b57cec5SDimitry Andric SMDiagnostic &Error, SMRange &SourceRange) const {
63081ad6265SDimitry Andric const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
6310b57cec5SDimitry Andric MachineFunction &MF = PFS.MF;
632bdd1243dSDimitry Andric MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
6330b57cec5SDimitry Andric return false;
6340b57cec5SDimitry Andric }
635