| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 74 switch (MI->getOpcode()) { in classof() 121 switch (MI->getOpcode()) { in classof() 175 switch (MI->getOpcode()) { in classof() 254 switch (MI->getOpcode()) { in classof() 364 switch (MI->getOpcode()) { in classof() 390 switch (getOpcode()) { in isAdd() 403 switch (getOpcode()) { in isSigned() 416 switch (MI->getOpcode()) { in classof() 461 switch (getOpcode()) { in hasSideEffects() 471 switch (getOpcode()) { in isConvergent() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64MacroFusion.cpp | 39 switch (FirstMI->getOpcode()) { in isArithmeticBccPair() 83 switch (FirstMI->getOpcode()) { in isArithmeticCbzPair() 124 switch (SecondMI.getOpcode()) { in isAESPair() 148 switch (FirstMI->getOpcode()) { in isCryptoEORPair() 200 switch (SecondMI.getOpcode()) { in isAddressLdStPair() 228 switch (FirstMI->getOpcode()) { in isAddressLdStPair() 288 switch (SecondMI.getOpcode()) { in isArithmeticLogicPair() 328 switch (FirstMI->getOpcode()) { in isArithmeticLogicPair() 364 switch (FirstMI->getOpcode()) { in isArithmeticLogicPair() 388 switch (SecondMI.getOpcode()) { in isAddSub2RegAndConstOnePair() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVInstrInfo.cpp | 29 switch (MI.getOpcode()) { in isConstantInstr() 55 return MI.getOpcode() == SPIRV::OpTypeForwardPointer; in isTypeDeclInstr() 60 switch (MI.getOpcode()) { in isDecorationInstr() 73 switch (MI.getOpcode()) { in isHeaderInstr() 95 switch (MI.getOpcode()) { in canUseFastMathFlags() 114 switch (MI.getOpcode()) { in canUseNSW() 131 switch (MI.getOpcode()) { in canUseNUW() 183 if (MI->getOpcode() == SPIRV::OpBranch) { in analyzeBranch() 248 if (MI.getOpcode() == SPIRV::GET_ID || MI.getOpcode() == SPIRV::GET_fID || in expandPostRAPseudo() 249 MI.getOpcode() == SPIRV::GET_pID || MI.getOpcode() == SPIRV::GET_vfID || in expandPostRAPseudo() [all …]
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| H A D | SPIRVPreLegalizer.cpp | 177 switch (MI->getOpcode()) { in propagateSPIRVType() 303 if (MI.getOpcode() == TargetOpcode::G_CONSTANT) in generateAssignInstrs() 326 MI.getOpcode() == TargetOpcode::COPY || in generateAssignInstrs() 349 SpvType->getOpcode() == SPIRV::OpTypeVector && in createNewIdReg() 371 unsigned Opc = MI.getOpcode(); in processInstr() 399 if (isTypeFoldingSupported(MI.getOpcode())) in processInstrsWithTypeFolding() 408 if (MI.getOpcode() != SPIRV::ASSIGN_TYPE) in processInstrsWithTypeFolding() 499 assert(CBr->getOpcode() == SPIRV::G_BRCOND); in processSwitches() 502 assert(Br->getOpcode() == SPIRV::G_BR); in processSwitches() 529 if (!((*j)->getOpcode() == TargetOpcode::G_ICMP && in processSwitches() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEISelDAGToDAG.cpp | 81 if (Addr.getOpcode() == ISD::FrameIndex) in INITIALIZE_PASS() 83 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in INITIALIZE_PASS() 84 Addr.getOpcode() == ISD::TargetGlobalAddress || in INITIALIZE_PASS() 85 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in INITIALIZE_PASS() 146 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzii() 177 Addr.getOpcode() == ISD::TargetGlobalAddress || in selectADDRzi() 200 if (Addr.getOpcode() == ISD::ADD) { in matchADDRrr() 202 } else if (Addr.getOpcode() == ISD::OR) { in matchADDRrr() 211 if (Addr.getOperand(0).getOpcode() == VEISD::Lo || in matchADDRrr() 212 Addr.getOperand(1).getOpcode() == VEISD::Lo) in matchADDRrr() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFMIChecking.cpp | 158 if (MI.getOpcode() != BPF::XADDW && in processAtomicInsts() 159 MI.getOpcode() != BPF::XADDD && in processAtomicInsts() 160 MI.getOpcode() != BPF::XADDW32) in processAtomicInsts() 189 if (MI.getOpcode() != BPF::XFADDW32 && MI.getOpcode() != BPF::XFADDD && in processAtomicInsts() 190 MI.getOpcode() != BPF::XFANDW32 && MI.getOpcode() != BPF::XFANDD && in processAtomicInsts() 191 MI.getOpcode() != BPF::XFXORW32 && MI.getOpcode() != BPF::XFXORD && in processAtomicInsts() 192 MI.getOpcode() != BPF::XFORW32 && MI.getOpcode() != BPF::XFORD) in processAtomicInsts() 200 switch (MI.getOpcode()) { in processAtomicInsts()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAGNodes.h | 208 inline unsigned getOpcode() const; 1158 return Node->getOpcode(); 1401 switch (getOpcode()) { 1421 switch (N->getOpcode()) { 1486 unsigned Op = getOpcode(); 2378 N->getOpcode() == ISD::STORE; 2406 return N->getOpcode() == ISD::LOAD; 2475 switch (getOpcode()) { 2488 switch (getOpcode()) { 2516 N->getOpcode() == ISD::VP_LOAD || N->getOpcode() == ISD::VP_STORE; [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVMergeBaseOffset.cpp | 87 if (Hi.getOpcode() != RISCV::LUI && Hi.getOpcode() != RISCV::AUIPC) in INITIALIZE_PASS() 105 if (Lo->getOpcode() != RISCV::ADDI) in INITIALIZE_PASS() 109 if (Hi.getOpcode() == RISCV::LUI) { in INITIALIZE_PASS() 115 assert(Hi.getOpcode() == RISCV::AUIPC); in INITIALIZE_PASS() 143 if (Hi.getOpcode() != RISCV::AUIPC) in foldOffset() 188 if (OffsetTail.getOpcode() == RISCV::ADDI || in foldLargeOffset() 269 if (OffsetTail.getOpcode() != RISCV::ADDI) in foldShiftedOffset() 280 switch (TailShXAdd.getOpcode()) { in foldShiftedOffset() 307 switch (Tail.getOpcode()) { in detectAndFoldOffset() 375 switch (UseMI.getOpcode()) { in foldIntoMemoryOps() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | R600EmitClauseMarkers.cpp | 38 switch (MI.getOpcode()) { in OccupiedDwords() 52 if (TII->isLDSRetInstr(MI.getOpcode())) in OccupiedDwords() 56 TII->isReductionOp(MI.getOpcode())) in OccupiedDwords() 71 if (TII->isALUInstr(MI.getOpcode())) in isALU() 73 if (TII->isVector(MI) || TII->isCubeOp(MI.getOpcode())) in isALU() 75 switch (MI.getOpcode()) { in isALU() 89 switch (MI.getOpcode()) { in IsTrivialInst() 119 if (!TII->isALUInstr(MI.getOpcode()) && MI.getOpcode() != R600::DOT_4) in SubstituteKCacheBank() 125 (TII->isALUInstr(MI.getOpcode()) || MI.getOpcode() == R600::DOT_4) && in SubstituteKCacheBank() 240 if (I->getOpcode() == R600::PRED_X) { in MakeALUClause() [all …]
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| H A D | R600Packetizer.cpp | 67 if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) in getPreviousVector() 84 int DstIdx = TII->getOperandIdx(BI->getOpcode(), R600::OpName::dst); in getPreviousVector() 93 if (BI->getOpcode() == R600::DOT4_r600 || in getPreviousVector() 94 BI->getOpcode() == R600::DOT4_eg) { in getPreviousVector() 131 int OperandIdx = TII->getOperandIdx(MI.getOpcode(), Op); in substitutePV() 166 if (!TII->isALUInstr(MI.getOpcode())) in isSoloInstruction() 168 if (MI.getOpcode() == R600::GROUP_BARRIER) in isSoloInstruction() 172 return TII->isLDSInstr(MI.getOpcode()); in isSoloInstruction() 297 unsigned Op = TII->getOperandIdx(MI->getOpcode(), in addToPacket() 302 TII->getOperandIdx(MI.getOpcode(), R600::OpName::bank_swizzle); in addToPacket() [all …]
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| H A D | R600InstrInfo.cpp | 139 if (isALUInstr(MI.getOpcode())) in canBeConsideredALU() 143 switch (MI.getOpcode()) { in canBeConsideredALU() 163 return isTransOnly(MI.getOpcode()); in isTransOnly() 171 return isVectorOnly(MI.getOpcode()); in isVectorOnly() 218 if (!isALUInstr(MI.getOpcode())) { in readsLDSSrcReg() 260 if (MI.getOpcode() == R600::DOT_4) { in getSrcs() 661 if (isBranch(I->getOpcode())) in analyzeBranch() 663 if (!isJump(I->getOpcode())) { in analyzeBranch() 789 switch (I->getOpcode()) { in removeBranch() 813 switch (I->getOpcode()) { in removeBranch() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | Operator.h | 41 unsigned getOpcode() const { in getOpcode() function 43 return I->getOpcode(); in getOpcode() 44 return cast<ConstantExpr>(this)->getOpcode(); in getOpcode() 49 static unsigned getOpcode(const Value *V) { in getOpcode() function 51 return I->getOpcode(); in getOpcode() 53 return CE->getOpcode(); in getOpcode() 113 I->getOpcode() == Instruction::Shl; in classof() 300 Opcode = I->getOpcode(); in classof() 302 Opcode = CE->getOpcode(); in classof() 339 return I->getOpcode() == Opc; in classof() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCISelDAGToDAG.cpp | 78 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeImm() 88 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeS9() 92 if (Addr.getOpcode() != ISD::ADD && Addr.getOpcode() != ISD::SUB && in SelectAddrModeS9() 94 if (Addr.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9() 108 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeS9() 115 if (Base.getOpcode() == ISD::FrameIndex) { in SelectAddrModeS9() 132 if (Addr.getOpcode() == ARCISD::GAWRAPPER) { in SelectAddrModeFar() 137 if (Addr.getOpcode() == ISD::SUB) in SelectAddrModeFar() 155 if (Addr.getOpcode() == ISD::ADD) { in SelectFrameADDR_ri() 171 switch (N->getOpcode()) { in Select()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonNewValueJump.cpp | 136 if (II->getOpcode() == TargetOpcode::KILL) in INITIALIZE_PASS_DEPENDENCY() 220 if (MII->getOpcode() == TargetOpcode::KILL || in commonChecksToProhibitNewValueJump() 221 MII->getOpcode() == TargetOpcode::PHI || in commonChecksToProhibitNewValueJump() 222 MII->getOpcode() == TargetOpcode::COPY) in commonChecksToProhibitNewValueJump() 229 if (MII->getOpcode() == Hexagon::LDriw_pred || in commonChecksToProhibitNewValueJump() 230 MII->getOpcode() == Hexagon::STriw_pred) in commonChecksToProhibitNewValueJump() 257 switch (MI.getOpcode()) { in canCompareBeNewValueJump() 295 if (def->getOpcode() == TargetOpcode::COPY) in canCompareBeNewValueJump() 347 switch (MI->getOpcode()) { in getNewValueJumpOpcode() 429 switch (MI.getOpcode()) { in isNewValueJumpCandidate() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVETPAndVPTOptimisationsPass.cpp | 128 if (T.getOpcode() == ARM::t2LoopEndDec && in findLoopComponents() 149 if (LoopEnd->getOpcode() == ARM::t2LoopEndDec) in findLoopComponents() 189 assert(MI->getOpcode() == ARM::t2WhileLoopSetup && in RevertWhileLoopSetup() 204 if (I.getOpcode() == ARM::t2WhileLoopStart) { in RevertWhileLoopSetup() 241 return MI.getOpcode() == ARM::t2WhileLoopStart; in LowerWhileLoopStart() 471 if (VCTP->getOpcode() != FirstVCTP->getOpcode() || in ConvertTailPredLoop() 582 assert(IsVCMP(Cond.getOpcode()) && IsVCMP(Prev.getOpcode())); in IsVPNOTEquivalent() 585 if (Cond.getOpcode() != Prev.getOpcode()) in IsVPNOTEquivalent() 599 if (!CanHaveSwappedOperands(Cond.getOpcode())) in IsVPNOTEquivalent() 871 if (!IsVCMP(Instr.getOpcode())) { in ReplaceVCMPsByVPNOTs() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCInstrAnalysis.h | 56 return Info->get(Inst.getOpcode()).isBranch(); in isBranch() 60 return Info->get(Inst.getOpcode()).isConditionalBranch(); in isConditionalBranch() 64 return Info->get(Inst.getOpcode()).isUnconditionalBranch(); in isUnconditionalBranch() 68 return Info->get(Inst.getOpcode()).isIndirectBranch(); in isIndirectBranch() 72 return Info->get(Inst.getOpcode()).isCall(); in isCall() 76 return Info->get(Inst.getOpcode()).isReturn(); in isReturn() 80 return Info->get(Inst.getOpcode()).isTerminator(); in isTerminator() 91 return Info->get(Inst.getOpcode()).hasDefOfPhysReg(Inst, PC, MCRI); in mayAffectControlFlow()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelDAGToDAG.cpp | 118 if (Addr.getOpcode() == ISD::OR && in INITIALIZE_PASS() 119 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) { in INITIALIZE_PASS() 168 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRiSpls() 169 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRiSpls() 197 Addr.getOperand(1).getOpcode() == LanaiISD::SMALL) in selectAddrRiSpls() 250 if (Addr.getOpcode() == ISD::FrameIndex) in selectAddrRr() 254 if ((Addr.getOpcode() == ISD::TargetExternalSymbol || in selectAddrRr() 255 Addr.getOpcode() == ISD::TargetGlobalAddress)) in selectAddrRr() 268 if (Addr.getOperand(0).getOpcode() == LanaiISD::HI || in selectAddrRr() 269 Addr.getOperand(0).getOpcode() == LanaiISD::LO || in selectAddrRr() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyCFGStackify.cpp | 305 if (MI.getOpcode() == WebAssembly::LOOP) { in placeBlockMarker() 320 MI.getOpcode() == WebAssembly::TRY) { in placeBlockMarker() 367 if (MI.getOpcode() == WebAssembly::LOOP || in placeBlockMarker() 368 MI.getOpcode() == WebAssembly::TRY) in placeBlockMarker() 542 MI.getOpcode() == WebAssembly::TRY) in placeTryMarker() 616 MI.getOpcode() == WebAssembly::BLOCK) in placeTryMarker() 757 if (MI.getOpcode() != WebAssembly::TRY) in removeUnnecessaryInstrs() 827 if (!WebAssembly::isTee(MI.getOpcode())) in unstackifyVRegsUsedInSplitBB() 1448 switch (MI.getOpcode()) { in recalculateScopeTops() 1494 switch (MI.getOpcode()) { in fixEndsAtEndOfFunction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | DelaySlotFiller.cpp | 116 (MI->getOpcode() == SP::RESTORErr in runOnMachineBasicBlock() 125 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD in runOnMachineBasicBlock() 126 || MI->getOpcode() == SP::FCMPQ)) { in runOnMachineBasicBlock() 177 unsigned Opc = slot->getOpcode(); in findDelayInstr() 186 if (J->getOpcode() == SP::RESTORErr in findDelayInstr() 271 unsigned Opcode = candidate->getOpcode(); in delayHasHazard() 297 switch(MI->getOpcode()) { in insertCallDefsUses() 359 switch (I->getOpcode()) { in needsUnimp() 418 if (OrMI->getOpcode() == SP::ORrr in combineRestoreOR() 423 if (OrMI->getOpcode() == SP::ORri in combineRestoreOR() [all …]
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| H A D | SparcISelDAGToDAG.cpp | 90 if (Addr.getOpcode() == ISD::TargetExternalSymbol || in SelectADDRri() 91 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRri() 92 Addr.getOpcode() == ISD::TargetGlobalTLSAddress) in SelectADDRri() 95 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRri() 111 if (Addr.getOperand(0).getOpcode() == SPISD::Lo) { in SelectADDRri() 116 if (Addr.getOperand(1).getOpcode() == SPISD::Lo) { in SelectADDRri() 130 Addr.getOpcode() == ISD::TargetGlobalAddress || in SelectADDRrr() 134 if (Addr.getOpcode() == ISD::ADD) { in SelectADDRrr() 139 Addr.getOperand(1).getOpcode() == SPISD::Lo) in SelectADDRrr() 331 switch (N->getOpcode()) { in Select() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCTLSDynamicCall.cpp | 61 bool IsTLSTPRelMI = MI.getOpcode() == PPC::GETtlsTpointer32AIX; in processBlock() 63 if (MI.getOpcode() != PPC::ADDItlsgdLADDR && in processBlock() 64 MI.getOpcode() != PPC::ADDItlsldLADDR && in processBlock() 65 MI.getOpcode() != PPC::ADDItlsgdLADDR32 && in processBlock() 66 MI.getOpcode() != PPC::ADDItlsldLADDR32 && in processBlock() 67 MI.getOpcode() != PPC::TLSGDAIX && in processBlock() 68 MI.getOpcode() != PPC::TLSGDAIX8 && !IsTLSTPRelMI && !IsPCREL) { in processBlock() 73 if (MI.getOpcode() == PPC::ADJCALLSTACKDOWN) in processBlock() 75 else if (MI.getOpcode() == PPC::ADJCALLSTACKUP) in processBlock() 93 switch (MI.getOpcode()) { in processBlock() [all …]
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| H A D | PPCBranchSelector.cpp | 142 if (TII->isPrefixed(MI.getOpcode())) { in ComputeBlockSizes() 331 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) && in runOnMachineFunction() 334 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ || in runOnMachineFunction() 335 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) && in runOnMachineFunction() 358 if (I->getOpcode() == PPC::BCC) { in runOnMachineFunction() 369 } else if (I->getOpcode() == PPC::BC) { in runOnMachineFunction() 372 } else if (I->getOpcode() == PPC::BCn) { in runOnMachineFunction() 375 } else if (I->getOpcode() == PPC::BDNZ) { in runOnMachineFunction() 377 } else if (I->getOpcode() == PPC::BDNZ8) { in runOnMachineFunction() 379 } else if (I->getOpcode() == PPC::BDZ) { in runOnMachineFunction() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.cpp | 105 if (LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch() 108 } else if (LastInst.getOpcode() == NVPTX::CBranch) { in analyzeBranch() 126 if (SecondLastInst.getOpcode() == NVPTX::CBranch && in analyzeBranch() 127 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch() 136 if (SecondLastInst.getOpcode() == NVPTX::GOTO && in analyzeBranch() 137 LastInst.getOpcode() == NVPTX::GOTO) { in analyzeBranch() 156 if (I->getOpcode() != NVPTX::GOTO && I->getOpcode() != NVPTX::CBranch) in removeBranch() 167 if (I->getOpcode() != NVPTX::CBranch) in removeBranch()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 1405 if (N0.getOpcode() == RedOpc && N1.getOpcode() == RedOpc && in reassociateReduction() 4162 if (N0.getOpcode() != Max || N1.getOpcode() != Min) in visitSUB() 6841 if (N0.getOpcode() != ISD::XOR && N0.getOpcode() != ISD::ADD) in foldAndToUsubsat() 7256 if (N0.getOpcode() == N1.getOpcode()) in visitAND() 7985 if (N0.getOpcode() == N1.getOpcode()) in visitOR() 8109 if (OppShiftLHS.getOpcode() != ExtractFrom.getOpcode() || in extractShiftForRotate() 8464 if (LHSShift.getOpcode() == RHSShift.getOpcode()) in MatchRotate() 10211 if (LeftOp.getOpcode() != RightOp.getOpcode()) in combineShiftToMULH() 12310 if (OpRHS.getOpcode() == CondRHS.getOpcode() && in visitVSELECT() 26654 if (N0.getOpcode() == ISD::BUILD_VECTOR && N0.getOpcode() == N1.getOpcode() && in scalarizeBinOpOfSplats() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86DynAllocaExpander.cpp | 81 assert(MI->getOpcode() == X86::DYN_ALLOCA_32 || in getDynAllocaAmount() 82 MI->getOpcode() == X86::DYN_ALLOCA_64); in getDynAllocaAmount() 89 (Def->getOpcode() != X86::MOV32ri && Def->getOpcode() != X86::MOV64ri) || in getDynAllocaAmount() 112 switch (MI.getOpcode()) { in isPushPop() 154 if (MI.getOpcode() == X86::DYN_ALLOCA_32 || in computeLowerings() 155 MI.getOpcode() == X86::DYN_ALLOCA_64) { in computeLowerings() 174 } else if (MI.getOpcode() == X86::ADJCALLSTACKUP32 || in computeLowerings() 175 MI.getOpcode() == X86::ADJCALLSTACKUP64) { in computeLowerings() 177 } else if (MI.getOpcode() == X86::ADJCALLSTACKDOWN32 || in computeLowerings() 178 MI.getOpcode() == X86::ADJCALLSTACKDOWN64) { in computeLowerings() [all …]
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