| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 194 Register MoveReg = MRI.createVirtualRegister(&PPC::VSFRCRegClass); in selectIntToFP() 221 Register CopyReg = MRI.createVirtualRegister(&PPC::VSFRCRegClass); in selectFPToInt() 224 Register ConvReg = MRI.createVirtualRegister(&PPC::VSFRCRegClass); in selectFPToInt() 253 MRI.createVirtualRegister(getRegClass(DstTy, DstRegBank)); in selectZExt() 258 MRI.createVirtualRegister(getRegClass(DstTy, DstRegBank)); in selectZExt() 325 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() 342 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() 373 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() 401 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() 417 Register TmpReg = MRI.createVirtualRegister(&PPC::G8RCRegClass); in selectI64ImmDirect() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 168 Register LUiReg = B.getMRI()->createVirtualRegister(&Mips::GPR32RegClass); in materialize32BitImm() 373 Register JTIndex = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 389 Register Dest = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 401 Register DestTmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 483 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 512 Register HILOReg = MRI.createVirtualRegister(&Mips::ACC64RegClass); in select() 598 Register GPRReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 702 Register LUiReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 757 Register Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() 871 Register TrueInReg = MRI.createVirtualRegister(&Mips::GPR32RegClass); in select() [all …]
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| H A D | MipsISelLowering.cpp | 1647 Register ScrReg = RegInfo.createVirtualRegister(RC); in emitSignExtendToI32InReg() 1678 Register Mask = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1679 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1680 Register Incr2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1682 Register PtrLSB2 = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1802 Register Off = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() 1873 Register Scratch = MRI.createVirtualRegister(RC); in emitAtomicCmpSwap() 1927 Register Mask = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() 1928 Register Mask2 = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() 1989 Register Off = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() [all …]
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| H A D | MipsMachineFunction.cpp | 58 MF.getRegInfo().createVirtualRegister(&getGlobalBaseRegClass(MF)); in getGlobalBaseReg() 84 Register V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() 85 Register V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
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| H A D | Mips16ISelDAGToDAG.cpp | 78 V0 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() 79 V1 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg() 80 V2 = RegInfo.createVirtualRegister(RC); in initGlobalBaseReg()
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| H A D | MipsSEISelLowering.cpp | 3054 Register VR2 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32() 3060 Register VR1 = RegInfo.createVirtualRegister(RC); in emitBPOSGE32() 3123 Register RD1 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() 3129 Register RD2 = RegInfo.createVirtualRegister(RC); in emitMSACBranchPseudo() 3177 Register Wt = RegInfo.createVirtualRegister( in emitCOPY_FW() 3240 Register Wt = RegInfo.createVirtualRegister( in emitINSERT_FW() 3434 Register Wt1 = RegInfo.createVirtualRegister( in emitFILL_FW() 3437 Register Wt2 = RegInfo.createVirtualRegister( in emitFILL_FW() 3567 Register Rt = RegInfo.createVirtualRegister(RC); in emitLD_F16_PSEUDO() 3809 Register Ws1 = RegInfo.createVirtualRegister(RC); in emitFEXP2_W_1() [all …]
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| H A D | MipsSEFrameLowering.cpp | 174 Register VR = MRI.createVirtualRegister(RC); in expandLoadCCond() 189 Register VR = MRI.createVirtualRegister(RC); in expandStoreCCond() 207 Register VR0 = MRI.createVirtualRegister(RC); in expandLoadACC() 208 Register VR1 = MRI.createVirtualRegister(RC); in expandLoadACC() 232 Register VR0 = MRI.createVirtualRegister(RC); in expandStoreACC() 233 Register VR1 = MRI.createVirtualRegister(RC); in expandStoreACC() 265 Register VR0 = MRI.createVirtualRegister(RC); in expandCopyACC() 266 Register VR1 = MRI.createVirtualRegister(RC); in expandCopyACC() 541 Register VR = MF.getRegInfo().createVirtualRegister(RC); in emitPrologue()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCExpandPseudos.cpp | 65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() 90 Register Ra = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ() 91 Register Rb = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTLZ() 118 Register R = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandCTTZ()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86SpeculativeLoadHardening.cpp | 447 PS->PoisonReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction() 480 PS->InitialReg = MRI->createVirtualRegister(PS->RC); in runOnMachineFunction() 1523 Register TmpReg = MRI->createVirtualRegister(PS->RC); in mergePredStateIntoSP() 1543 Register PredStateReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() 1544 Register TmpReg = MRI->createVirtualRegister(PS->RC); in extractPredStateFromSP() 1651 Register TmpReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() 1672 Register VBStateReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() 1702 Register VStateReg = MRI->createVirtualRegister(OpRC); in hardenLoadAddr() 1925 Register NewReg = MRI->createVirtualRegister(RC); in hardenValueInRegister() 2116 ExpectedRetAddrReg = MRI->createVirtualRegister(AddrRC); in tracePredStateThroughCall() [all …]
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| H A D | X86FastPreTileConfig.cpp | 168 Register Zmm = MRI->createVirtualRegister(&X86::VR512RegClass); in InitializeTileConfigStackSpace() 173 Register Ymm = MRI->createVirtualRegister(&X86::VR256RegClass); in InitializeTileConfigStackSpace() 183 Register Xmm = MRI->createVirtualRegister(&X86::VR128RegClass); in InitializeTileConfigStackSpace() 235 TileReg = MRI->createVirtualRegister(&RC); in reload() 240 Register StrideReg = MRI->createVirtualRegister(&X86::GR64_NOSPRegClass); in reload() 329 Register StackAddrReg = MRI->createVirtualRegister(&X86::GR64_NOSPRegClass); in convertPHI() 332 Register RowReg = MRI->createVirtualRegister(&X86::GR16RegClass); in convertPHI() 335 Register ColReg = MRI->createVirtualRegister(&X86::GR16RegClass); in convertPHI() 399 MRI->createVirtualRegister(&X86::GR64_NOSPRegClass); in convertPHI() 409 Register StrideReg = MRI->createVirtualRegister(&X86::GR64_NOSPRegClass); in convertPHI()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFrameLowering.cpp | 286 SPReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 296 Register BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() 303 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 311 Register BitmaskReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() 355 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() 361 SPReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue()
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| H A D | WebAssemblyPeephole.cpp | 67 Register NewReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); in maybeRewriteToDrop() 100 Register NewReg = MRI.createVirtualRegister(RegClass); in maybeRewriteToFallthrough()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstrInfo.cpp | 3293 Register DstElt = MRI.createVirtualRegister(EltRC); in insertSelect() 5518 Register Reg = MRI.createVirtualRegister(VRC); in legalizeOpWithMove() 5530 Register SubReg = MRI.createVirtualRegister(SubRC); in buildExtractSubReg() 5945 Register DstReg = MRI.createVirtualRegister(SRC); in readlaneVGPRToSGPR() 5950 Register NewSrcReg = MRI.createVirtualRegister(VRC); in readlaneVGPRToSGPR() 6117 Register DstReg = MRI.createVirtualRegister(DstRC); in legalizeGenericOperand() 7372 NewDstReg = MRI.createVirtualRegister(NewDstRC); in moveToVALUImpl() 7449 NewCondReg = MRI.createVirtualRegister(TC); in lowerSelect() 7480 Register NewDestReg = MRI.createVirtualRegister( in lowerSelect() 7983 Register NewDest = MRI.createVirtualRegister(DestRC); in splitScalar64BitXnor() [all …]
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| H A D | AMDGPUInstructionSelector.cpp | 255 Register DstReg = MRI->createVirtualRegister(&SubRC); in getSubOperand64() 376 Register DstLo = MRI->createVirtualRegister(&HalfRC); in selectG_ADD_SUB() 377 Register DstHi = MRI->createVirtualRegister(&HalfRC); in selectG_ADD_SUB() 1998 Register TmpReg = MRI->createVirtualRegister( in selectImageIntrinsic() 2287 Register LoReg = MRI->createVirtualRegister(DstRC); in selectG_TRUNC() 2636 Register LoReg = MRI->createVirtualRegister(RC); in selectG_CONSTANT() 2637 Register HiReg = MRI->createVirtualRegister(RC); in selectG_CONSTANT() 3012 Register HiReg = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() 3013 Register LoReg = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() 3029 MaskedLo = MRI->createVirtualRegister(&RegRC); in selectG_PTRMASK() [all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVRVVInitUndef.cpp | 207 Register TmpInitSubReg = MRI->createVirtualRegister(SubRegClass); in handleSubReg() 211 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in handleSubReg() 235 Register NewReg = MRI->createVirtualRegister(TargetRegClass); in fixupIllOperand() 258 Register NewDest = MRI->createVirtualRegister(RC); in processBasicBlock()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | SwiftErrorValueTracking.cpp | 37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg() 59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt() 133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in createEntriesInEntryBlock() 242 UpwardsUse ? UUseVReg : MF->getRegInfo().createVirtualRegister(RC); in propagateVRegs()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/CSKY/ |
| H A D | CSKYRegisterInfo.cpp | 200 ? MRI.createVirtualRegister(&CSKY::GPRRegClass) in eliminateFrameIndex() 201 : MRI.createVirtualRegister(&CSKY::mGPRRegClass); in eliminateFrameIndex() 221 NewReg = MRI.createVirtualRegister(&CSKY::GPRRegClass); in eliminateFrameIndex() 225 NewReg = MRI.createVirtualRegister(&CSKY::mGPRRegClass); in eliminateFrameIndex()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 848 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca() 856 NegSizeReg = MF.getRegInfo().createVirtualRegister(G8RC); in prepareDynamicAlloca() 865 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca() 873 NegSizeReg = MF.getRegInfo().createVirtualRegister(GPRC); in prepareDynamicAlloca() 1404 Register VSRpReg0 = MF.getRegInfo().createVirtualRegister(RC); in lowerWACCSpilling() 1405 Register VSRpReg1 = MF.getRegInfo().createVirtualRegister(RC); in lowerWACCSpilling() 1438 Register VSRpReg0 = MF.getRegInfo().createVirtualRegister(RC); in lowerWACCRestore() 1439 Register VSRpReg1 = MF.getRegInfo().createVirtualRegister(RC); in lowerWACCRestore() 1751 SRegHi = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex() 1752 SReg = MF.getRegInfo().createVirtualRegister(RC); in eliminateFrameIndex() [all …]
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| H A D | PPCVSXCopy.cpp | 105 Register NewVReg = MRI.createVirtualRegister(SrcRC); in processBlock() 127 Register NewVReg = MRI.createVirtualRegister(DstRC); in processBlock()
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| H A D | PPCCTRLoops.cpp | 254 MRI->createVirtualRegister(Is64Bit ? &PPC::G8RC_and_G8RC_NOX0RegClass in expandNormalLoops() 266 MRI->createVirtualRegister(Is64Bit ? &PPC::G8RC_and_G8RC_NOX0RegClass in expandNormalLoops() 299 Register CMPDef = MRI->createVirtualRegister(&PPC::CRRCRegClass); in expandNormalLoops()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZCopyPhysRegs.cpp | 82 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); in visitMBB() 92 Register Tmp = MRI->createVirtualRegister(&SystemZ::GR32BitRegClass); in visitMBB()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 418 MRI->createVirtualRegister(QPR ? &ARM::QPRRegClass : &ARM::DPRRegClass); in createDupLane() 433 Register Out = MRI->createVirtualRegister(TRC); in createExtractSubreg() 447 Register Out = MRI->createVirtualRegister(&ARM::QPRRegClass); in createRegSequence() 465 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createVExt() 477 Register Out = MRI->createVirtualRegister(&ARM::DPR_VFP2RegClass); in createInsertSubreg() 493 Register Out = MRI->createVirtualRegister(&ARM::DPRRegClass); in createImplicitDef()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVExtract.cpp | 71 Register ElemR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad() 90 Register IdxR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in genElemLoad() 124 Register AddrR = MRI.createVirtualRegister(&Hexagon::IntRegsRegClass); in runOnMachineFunction()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchRegisterInfo.cpp | 149 Register ScratchReg = MRI.createVirtualRegister(&LoongArch::GPRRegClass); in eliminateFrameIndex() 168 Register ScratchReg = MRI.createVirtualRegister(&LoongArch::GPRRegClass); in eliminateFrameIndex() 181 Register ScratchReg = MRI.createVirtualRegister(&LoongArch::GPRRegClass); in eliminateFrameIndex()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 206 ShAmtReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectShiftMask() 217 ShAmtReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectShiftMask() 266 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() 278 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() 317 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADDOp() 356 Register DstReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectSHXADD_UWOp() 568 Register GPRReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in select() 581 Register GPRRegLow = MRI.createVirtualRegister(&RISCV::GPRRegClass); in select() 1192 TmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectFPCompare() 1208 TmpReg = MRI.createVirtualRegister(&RISCV::GPRRegClass); in selectFPCompare() [all …]
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