1240     Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1253       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1267       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1283       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1297       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1309       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1310       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1327       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1328       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1358   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertEQ()
1371   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertNE()
2620       auto Tmp = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in expandMovDPP64()
2845   Register PCReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in insertIndirectBranch()
3293     Register DstElt = MRI.createVirtualRegister(EltRC);  in insertSelect()
5518   Register Reg = MRI.createVirtualRegister(VRC);  in legalizeOpWithMove()
5530   Register SubReg = MRI.createVirtualRegister(SubRC);  in buildExtractSubReg()
5542   Register NewSuperReg = MRI.createVirtualRegister(SuperRC);  in buildExtractSubReg()
5756       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5762       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5795     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
5867       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
5873       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
5945   Register DstReg = MRI.createVirtualRegister(SRC);  in readlaneVGPRToSGPR()
5950     Register NewSrcReg = MRI.createVirtualRegister(VRC);  in readlaneVGPRToSGPR()
5966     Register SGPR = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in readlaneVGPRToSGPR()
6117   Register DstReg = MRI.createVirtualRegister(DstRC);  in legalizeGenericOperand()
6173       Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6178       Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6188         Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6204         Register CurRegLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6205         Register CurRegHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6220         Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass);  in emitLoadScalarOpsFromVGPRLoop()
6227         Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6241           Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6251       Register SScalarOp = MRI.createVirtualRegister(SScalarOpRC);  in emitLoadScalarOpsFromVGPRLoop()
6267   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadScalarOpsFromVGPRLoop()
6315     SaveSCCReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in loadMBUFScalarOperandsFromVGPR()
6321   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in loadMBUFScalarOperandsFromVGPR()
6402   Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in extractRsrcPtr()
6403   Register SRsrcFormatLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
6404   Register SRsrcFormatHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
6405   Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);  in extractRsrcPtr()
6633     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperands()
6690       Register NewVAddrLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
6691       Register NewVAddrHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
6692       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
6695       Register CondReg0 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
6696       Register CondReg1 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
6735       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
7076       Register NewCarryReg = MRI.createVirtualRegister(CarryRC);  in moveToVALUImpl()
7083     Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass(  in moveToVALUImpl()
7111     Register DestReg = MRI.createVirtualRegister(NewRC);  in moveToVALUImpl()
7173     Register CondReg = MRI.createVirtualRegister(RI.getWaveMaskRegClass());  in moveToVALUImpl()
7199     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7200     Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7220     Register NewDst = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveToVALUImpl()
7281     Register NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALUImpl()
7372     NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALUImpl()
7395     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()
7449     NewCondReg = MRI.createVirtualRegister(TC);  in lowerSelect()
7480   Register NewDestReg = MRI.createVirtualRegister(  in lowerSelect()
7511   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
7512   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
7541     Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarXnor()
7561     Register Temp = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
7562     Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
7606   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
7607   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
7635   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
7636   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
7680   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
7686   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
7692   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()
7719   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalarSMulU64()
7720   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7721   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7766   Register Op1L_Op0H_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7772   Register Op1H_Op0L_Reg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7778   Register CarryReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7789   Register AddReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulU64()
7828   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalarSMulPseudo()
7829   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulPseudo()
7830   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalarSMulPseudo()
7926   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
7931   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
7936   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()
7967   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in splitScalar64BitXnor()
7983   Register NewDest = MRI.createVirtualRegister(DestRC);  in splitScalar64BitXnor()
8010   Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
8011   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
8051     Register MidRegLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8052     Register MidRegHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8053     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
8076   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
8077   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
8125   Register MidReg1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8126   Register MidReg2 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8127   Register MidReg3 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8128   Register MidReg4 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitCountOp()
8187   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8195     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8196     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8214     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8224     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8235     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8236     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
8658     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformIfRegion()
8685     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8686     Register BackEdgeReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8693         Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
8829   Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());  in getAddNoCarry()
9807   Register Undef = MRI.createVirtualRegister(  in enforceOperandRCAlignment()
9811       MRI.createVirtualRegister(IsAGPR ? &AMDGPU::AReg_64_Align2RegClass  in enforceOperandRCAlignment()