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Searched refs:PPC (Results 1 – 25 of 124) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCPredicates.cpp17 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
19 case PPC::PRED_EQ: return PPC::PRED_NE; in InvertPredicate()
20 case PPC::PRED_NE: return PPC::PRED_EQ; in InvertPredicate()
21 case PPC::PRED_LT: return PPC::PRED_GE; in InvertPredicate()
22 case PPC::PRED_GE: return PPC::PRED_LT; in InvertPredicate()
23 case PPC::PRED_GT: return PPC::PRED_LE; in InvertPredicate()
24 case PPC::PRED_LE: return PPC::PRED_GT; in InvertPredicate()
25 case PPC::PRED_NU: return PPC::PRED_UN; in InvertPredicate()
26 case PPC::PRED_UN: return PPC::PRED_NU; in InvertPredicate()
51 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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H A DPPCMCCodeEmitter.cpp78 case PPC::BL8: in isNoTOCCallInstr()
79 case PPC::BL: in isNoTOCCallInstr()
82 case PPC::BLA8: in isNoTOCCallInstr()
83 case PPC::BLA: in isNoTOCCallInstr()
84 case PPC::BCCL: in isNoTOCCallInstr()
85 case PPC::BCCLA: in isNoTOCCallInstr()
86 case PPC::BCL: in isNoTOCCallInstr()
87 case PPC::BCLn: in isNoTOCCallInstr()
93 case PPC::BCTRL: in isNoTOCCallInstr()
115 case PPC::BLRL: in isNoTOCCallInstr()
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H A DPPCMCTargetDesc.h17 #undef PPC
37 namespace PPC {
265 static const MCPhysReg RRegsNoR0[32] = PPC_REGS_NO0_31(PPC::ZERO, PPC::R); \
271 PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN, PPC::CR1LT, PPC::CR1GT, \
272 PPC::CR1EQ, PPC::CR1UN, PPC::CR2LT, PPC::CR2GT, PPC::CR2EQ, PPC::CR2UN, \
273 PPC::CR3LT, PPC::CR3GT, PPC::CR3EQ, PPC::CR3UN, PPC::CR4LT, PPC::CR4GT, \
274 PPC::CR4EQ, PPC::CR4UN, PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, \
275 PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, \
287 namespace PPC {
289 return Reg >= PPC::VF0 && Reg <= PPC::VF31; in isVFRegister()
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H A DPPCInstPrinter.cpp63 (MI->getOpcode() == PPC::ADDIS8 || MI->getOpcode() == PPC::ADDIS) && in printInst()
163 if ((MI->getOpcode() == PPC::DCBT || MI->getOpcode() == PPC::DCBTST) && in printInst()
228 case PPC::PRED_LT: in printPredicateOperand()
233 case PPC::PRED_LE: in printPredicateOperand()
238 case PPC::PRED_EQ: in printPredicateOperand()
243 case PPC::PRED_GE: in printPredicateOperand()
248 case PPC::PRED_GT: in printPredicateOperand()
253 case PPC::PRED_NE: in printPredicateOperand()
258 case PPC::PRED_UN: in printPredicateOperand()
263 case PPC::PRED_NU: in printPredicateOperand()
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H A DPPCAsmBackend.cpp36 case PPC::fixup_ppc_nofixup: in adjustFixupValue()
38 case PPC::fixup_ppc_brcond14: in adjustFixupValue()
41 case PPC::fixup_ppc_br24: in adjustFixupValue()
42 case PPC::fixup_ppc_br24abs: in adjustFixupValue()
45 case PPC::fixup_ppc_half16: in adjustFixupValue()
50 case PPC::fixup_ppc_pcrel34: in adjustFixupValue()
51 case PPC::fixup_ppc_imm34: in adjustFixupValue()
63 case PPC::fixup_ppc_half16: in getFixupKindNumBytes()
70 case PPC::fixup_ppc_br24: in getFixupKindNumBytes()
71 case PPC::fixup_ppc_br24abs: in getFixupKindNumBytes()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp287 {PPC::XSMADDADP, PPC::XSADDDP, PPC::XSMULDP, 1, 2, PPC::XSSUBDP},
288 {PPC::XSMADDASP, PPC::XSADDSP, PPC::XSMULSP, 1, 2, PPC::XSSUBSP},
289 {PPC::XVMADDADP, PPC::XVADDDP, PPC::XVMULDP, 1, 2, PPC::XVSUBDP},
290 {PPC::XVMADDASP, PPC::XVADDSP, PPC::XVMULSP, 1, 2, PPC::XVSUBSP},
291 {PPC::FMADD, PPC::FADD, PPC::FMUL, 3, 1, PPC::FSUB},
292 {PPC::FMADDS, PPC::FADDS, PPC::FMULS, 3, 1, PPC::FSUBS}};
3383 Opc == PPC::ORI || Opc == PPC::ORI8 || Opc == PPC::XORI || in getForwardingDefMI()
3897 III.ImmOpcode = Opc == PPC::ADD4 ? PPC::ADDI : PPC::ADDI8; in instrHasImmForm()
3906 III.ImmOpcode = Opc == PPC::ADDC ? PPC::ADDIC : PPC::ADDIC8; in instrHasImmForm()
3930 III.ImmOpcode = Opc == PPC::CMPW ? PPC::CMPWI : PPC::CMPDI; in instrHasImmForm()
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H A DPPCRegisterInfo.cpp103 ImmToIdxMap[PPC::LD] = PPC::LDX; ImmToIdxMap[PPC::STD] = PPC::STDX; in PPCRegisterInfo()
104 ImmToIdxMap[PPC::LBZ] = PPC::LBZX; ImmToIdxMap[PPC::STB] = PPC::STBX; in PPCRegisterInfo()
105 ImmToIdxMap[PPC::LHZ] = PPC::LHZX; ImmToIdxMap[PPC::LHA] = PPC::LHAX; in PPCRegisterInfo()
106 ImmToIdxMap[PPC::LWZ] = PPC::LWZX; ImmToIdxMap[PPC::LWA] = PPC::LWAX; in PPCRegisterInfo()
107 ImmToIdxMap[PPC::LFS] = PPC::LFSX; ImmToIdxMap[PPC::LFD] = PPC::LFDX; in PPCRegisterInfo()
108 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
109 ImmToIdxMap[PPC::STFS] = PPC::STFSX; ImmToIdxMap[PPC::STFD] = PPC::STFDX; in PPCRegisterInfo()
114 ImmToIdxMap[PPC::LHA8] = PPC::LHAX8; ImmToIdxMap[PPC::LBZ8] = PPC::LBZX8; in PPCRegisterInfo()
115 ImmToIdxMap[PPC::LHZ8] = PPC::LHZX8; ImmToIdxMap[PPC::LWZ8] = PPC::LWZX8; in PPCRegisterInfo()
116 ImmToIdxMap[PPC::STB8] = PPC::STBX8; ImmToIdxMap[PPC::STH8] = PPC::STHX8; in PPCRegisterInfo()
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H A DPPCInstrInfo.h92 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
93 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXVD2X, PPC::LXSDX, PPC::LXSSPX, \
100 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
101 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64, \
108 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
109 PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXV, PPC::DFLOADf64, \
116 PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR, \
124 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
132 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
140 PPC::STW, PPC::STD, PPC::STFD, PPC::STFS, PPC::SPILL_CR, PPC::SPILL_CRBIT, \
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H A DPPCVSXSwapRemoval.cpp337 case PPC::LVX: in gatherVectorInstructions()
362 case PPC::STVX: in gatherVectorInstructions()
376 case PPC::COPY: in gatherVectorInstructions()
433 case PPC::LVSL: in gatherVectorInstructions()
434 case PPC::LVSR: in gatherVectorInstructions()
435 case PPC::LVXL: in gatherVectorInstructions()
489 case PPC::VRLB: in gatherVectorInstructions()
490 case PPC::VRLD: in gatherVectorInstructions()
491 case PPC::VRLH: in gatherVectorInstructions()
496 case PPC::VSL: in gatherVectorInstructions()
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H A DPPCCallingConv.cpp34 static const MCPhysReg ELF64ArgGPRs[] = {PPC::X3, PPC::X4, PPC::X5, PPC::X6, in CC_PPC64_ELF_Shadow_GPR_Regs()
35 PPC::X7, PPC::X8, PPC::X9, PPC::X10}; in CC_PPC64_ELF_Shadow_GPR_Regs()
73 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_AlignArgRegs()
74 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_AlignArgRegs()
98 PPC::R3, PPC::R4, PPC::R5, PPC::R6, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
99 PPC::R7, PPC::R8, PPC::R9, PPC::R10, in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
123 PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
124 PPC::F8 in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
150 static const MCPhysReg HiRegList[] = { PPC::R3, PPC::R5, PPC::R7, PPC::R9 }; in CC_PPC32_SPE_CustomSplitFP64()
151 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64()
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H A DPPCMIPeephole.cpp256 if (Opcode == PPC::LHZ || Opcode == PPC::LHZX || in getKnownLeadingZeroCount()
257 Opcode == PPC::LHZ8 || Opcode == PPC::LHZX8 || in getKnownLeadingZeroCount()
258 Opcode == PPC::LHZU || Opcode == PPC::LHZUX || in getKnownLeadingZeroCount()
259 Opcode == PPC::LHZU8 || Opcode == PPC::LHZUX8) in getKnownLeadingZeroCount()
265 Opcode == PPC::LBZU8 || Opcode == PPC::LBZUX8) in getKnownLeadingZeroCount()
268 if (Opcode == PPC::AND || Opcode == PPC::AND8 || Opcode == PPC::AND_rec || in getKnownLeadingZeroCount()
274 if (Opcode == PPC::OR || Opcode == PPC::OR8 || Opcode == PPC::XOR || in getKnownLeadingZeroCount()
1385 if (opCode == PPC::CMPLD) return PPC::CMPD; in getSignedCmpOpCode()
1386 if (opCode == PPC::CMPLW) return PPC::CMPW; in getSignedCmpOpCode()
1387 if (opCode == PPC::CMPLDI) return PPC::CMPDI; in getSignedCmpOpCode()
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H A DPPCRegisterInfo.h28 if (SrcReg == PPC::CR0LT || SrcReg == PPC::CR0GT || in getCRFromCRBit()
29 SrcReg == PPC::CR0EQ || SrcReg == PPC::CR0UN) in getCRFromCRBit()
31 else if (SrcReg == PPC::CR1LT || SrcReg == PPC::CR1GT || in getCRFromCRBit()
32 SrcReg == PPC::CR1EQ || SrcReg == PPC::CR1UN) in getCRFromCRBit()
34 else if (SrcReg == PPC::CR2LT || SrcReg == PPC::CR2GT || in getCRFromCRBit()
35 SrcReg == PPC::CR2EQ || SrcReg == PPC::CR2UN) in getCRFromCRBit()
38 SrcReg == PPC::CR3EQ || SrcReg == PPC::CR3UN) in getCRFromCRBit()
41 SrcReg == PPC::CR4EQ || SrcReg == PPC::CR4UN) in getCRFromCRBit()
44 SrcReg == PPC::CR5EQ || SrcReg == PPC::CR5UN) in getCRFromCRBit()
47 SrcReg == PPC::CR6EQ || SrcReg == PPC::CR6UN) in getCRFromCRBit()
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H A DPPCFastISel.cpp476 Opc = Is32BitInt ? PPC::LBZ : PPC::LBZ8; in PPCEmitLoad()
564 case PPC::LFS: Opc = IsVSSRC ? PPC::LXSSPX : PPC::LFSX; break; in PPCEmitLoad()
565 case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break; in PPCEmitLoad()
710 case PPC::STFS: Opc = IsVSSRC ? PPC::STXSSPX : PPC::STFSX; break; in PPCEmitStore()
711 case PPC::STFD: Opc = IsVSFRC ? PPC::STXSDX : PPC::STFDX; break; in PPCEmitStore()
1230 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTSIZ : PPC::EFDCTSIZ; in SelectFPToI()
1232 Opc = InRC == &PPC::GPRCRegClass ? PPC::EFSCTUIZ : PPC::EFDCTUIZ; in SelectFPToI()
1289 Opc = IsGPRC ? PPC::ADD4 : PPC::ADD8; in SelectBinaryIntOp()
1292 Opc = IsGPRC ? PPC::OR : PPC::OR8; in SelectBinaryIntOp()
1295 Opc = IsGPRC ? PPC::SUBF : PPC::SUBF8; in SelectBinaryIntOp()
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H A DPPCTLSDynamicCall.cpp86 Register GPR3 = Is64Bit ? PPC::X3 : PPC::R3; in processBlock()
87 Register GPR4 = Is64Bit ? PPC::X4 : PPC::R4; in processBlock()
96 case PPC::ADDItlsgdLADDR: in processBlock()
97 Opc1 = PPC::ADDItlsgdL; in processBlock()
98 Opc2 = PPC::GETtlsADDR; in processBlock()
100 case PPC::ADDItlsldLADDR: in processBlock()
101 Opc1 = PPC::ADDItlsldL; in processBlock()
112 case PPC::TLSGDAIX8: in processBlock()
117 case PPC::TLSGDAIX: in processBlock()
128 case PPC::PADDI8pc: in processBlock()
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H A DPPCFrameLowering.cpp387 unsigned FPReg = is31 ? PPC::R31 : PPC::R1; in replaceFPWithRealFP()
388 unsigned FP8Reg = is31 ? PPC::X31 : PPC::X1; in replaceFPWithRealFP()
649 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in emitPrologue()
651 Register FPReg = isPPC64 ? PPC::X31 : PPC::R31; in emitPrologue()
652 Register LRReg = isPPC64 ? PPC::LR8 : PPC::LR; in emitPrologue()
653 Register TOCReg = isPPC64 ? PPC::X2 : PPC::R2; in emitPrologue()
1184 if (Reg == PPC::LR || Reg == PPC::LR8 || Reg == PPC::RM) continue; in emitPrologue()
1258 Register SPReg = isPPC64 ? PPC::X1 : PPC::R1; in inlineStackProbe()
2030 SavedRegs.reset(isPPC64 ? PPC::X31 : PPC::R31); in determineCalleeSaves()
2103 (Reg != PPC::X2 && Reg != PPC::R2)) && in processFunctionBeforeFrameFinalized()
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H A DPPCPreEmitPeephole.cpp61 case PPC::LBZ: in hasPCRelativeForm()
63 case PPC::LHA: in hasPCRelativeForm()
65 case PPC::LHZ: in hasPCRelativeForm()
67 case PPC::LWZ: in hasPCRelativeForm()
69 case PPC::STB: in hasPCRelativeForm()
71 case PPC::STH: in hasPCRelativeForm()
73 case PPC::STW: in hasPCRelativeForm()
75 case PPC::LD: in hasPCRelativeForm()
76 case PPC::STD: in hasPCRelativeForm()
77 case PPC::LWA: in hasPCRelativeForm()
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H A DPPCISelDAGToDAG.cpp1070 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
1207 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
4310 return UseSPE ? PPC::PRED_GT : PPC::PRED_EQ; in getPredicateForSetCC()
4313 return UseSPE ? PPC::PRED_LE : PPC::PRED_NE; in getPredicateForSetCC()
4316 return UseSPE ? PPC::PRED_GT : PPC::PRED_LT; in getPredicateForSetCC()
4325 return UseSPE ? PPC::PRED_LE : PPC::PRED_GE; in getPredicateForSetCC()
4876 PCC = IsCCNE ? PPC::PRED_UN : PPC::PRED_NU; in tryFoldSWTestBRCC()
4879 PCC = IsCCNE ? PPC::PRED_EQ : PPC::PRED_NE; in tryFoldSWTestBRCC()
4882 PCC = IsCCNE ? PPC::PRED_GT : PPC::PRED_LE; in tryFoldSWTestBRCC()
4885 PCC = IsCCNE ? PPC::PRED_LT : PPC::PRED_GE; in tryFoldSWTestBRCC()
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H A DPPCExpandAtomicPseudoInsts.cpp94 case PPC::ATOMIC_SWAP_I128: in expandMI()
196 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_OR_I128, PPC::OR8); in expandAtomicRMW128()
197 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_XOR_I128, PPC::XOR8); in expandAtomicRMW128()
198 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_AND_I128, PPC::AND8); in expandAtomicRMW128()
199 TRIVIAL_ATOMICRMW(PPC::ATOMIC_LOAD_NAND_I128, PPC::NAND8); in expandAtomicRMW128()
206 .addImm(PPC::PRED_NE) in expandAtomicRMW128()
207 .addReg(PPC::CR0) in expandAtomicRMW128()
274 .addImm(PPC::PRED_NE) in expandAtomicCmpSwap128()
275 .addReg(PPC::CR0) in expandAtomicCmpSwap128()
285 .addImm(PPC::PRED_NE) in expandAtomicCmpSwap128()
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H A DPPCHazardRecognizers.cpp95 case PPC::Sched::IIC_IntDivW: in mustComeFirst()
96 case PPC::Sched::IIC_IntDivD: in mustComeFirst()
98 case PPC::Sched::IIC_LdStLDU: in mustComeFirst()
101 case PPC::Sched::IIC_LdStLHA: in mustComeFirst()
103 case PPC::Sched::IIC_LdStLWA: in mustComeFirst()
104 case PPC::Sched::IIC_LdStSTU: in mustComeFirst()
164 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in PreEmitNoops()
165 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9) in PreEmitNoops()
225 if (Directive == PPC::DIR_PWR6 || Directive == PPC::DIR_PWR7 || in EmitNoop()
226 Directive == PPC::DIR_PWR8 || Directive == PPC::DIR_PWR9 || in EmitNoop()
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H A DPPCAsmPrinter.cpp381 Reg = PPC::VSX32 + (Reg - PPC::V0); in PrintAsmOperand()
383 Reg = PPC::VSX32 + (Reg - PPC::VF0); in PrintAsmOperand()
1255 TmpInst.setOpcode(IsPPC64 ? PPC::LD : PPC::LWZ); in emitInstruction()
1475 MI->getOpcode() == PPC::MFOCRF ? PPC::MFCR : PPC::MFCR8; in emitInstruction()
1489 MI->getOpcode() == PPC::MTOCRF ? PPC::MTCRF : PPC::MTCRF8; in emitInstruction()
1519 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); in emitInstruction()
1522 MCInstBuilder(PPC::ORI).addReg(PPC::X2).addReg(PPC::X2).addImm(0)); in emitInstruction()
1600 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); in emitInstruction()
1685 MCInstBuilder(PPC::STD).addReg(PPC::X0).addImm(-8).addReg(PPC::X1)); in emitInstruction()
2262 for (unsigned Reg = PPC::V0; Reg <= PPC::V31; ++Reg) in emitTracebackTable()
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H A DPPCCTRLoops.cpp126 return MI->definesRegister(PPC::CTR) || MI->definesRegister(PPC::CTR8); in isCTRClobber()
129 if (MI->modifiesRegister(PPC::CTR) || MI->modifiesRegister(PPC::CTR8)) in isCTRClobber()
137 if (MI->readsRegister(PPC::CTR) || MI->readsRegister(PPC::CTR8)) in isCTRClobber()
157 MI.getOpcode() == PPC::MTCTR8loop; in processLoop()
185 if (Preheader->isLiveIn(PPC::CTR) || Preheader->isLiveIn(PPC::CTR8)) in processLoop()
250 unsigned ADDIOpcode = Is64Bit ? PPC::ADDI8 : PPC::ADDI; in expandNormalLoops()
251 unsigned CMPOpcode = Is64Bit ? PPC::CMPLDI : PPC::CMPLWI; in expandNormalLoops()
328 unsigned BDNZOpcode = Is64Bit ? PPC::BDNZ8 : PPC::BDNZ; in expandCTRLoops()
329 unsigned BDZOpcode = Is64Bit ? PPC::BDZ8 : PPC::BDZ; in expandCTRLoops()
336 case PPC::BC: in expandCTRLoops()
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H A DPPCReduceCRLogicals.cpp162 : OrigBROpcode == PPC::BCLR ? PPC::BCLRn : PPC::BCLR; in splitMBB()
274 if (BROp == PPC::BC || BROp == PPC::BCLR) { in computeBranchTargetAndInversion()
310 } else if (BROp == PPC::BCn || BROp == PPC::BCLRn) { in computeBranchTargetAndInversion()
392 return Opc == PPC::CRAND || Opc == PPC::CRNAND || Opc == PPC::CROR || in isCRLogical()
393 Opc == PPC::CRXOR || Opc == PPC::CRNOR || Opc == PPC::CRNOT || in isCRLogical()
394 Opc == PPC::CREQV || Opc == PPC::CRANDC || Opc == PPC::CRORC || in isCRLogical()
395 Opc == PPC::CRSET || Opc == PPC::CRUNSET || Opc == PPC::CR6SET || in isCRLogical()
502 if (Opc == PPC::ISEL || Opc == PPC::ISEL8) in createCRLogicalOpInfo()
504 if (Opc == PPC::BC || Opc == PPC::BCn || Opc == PPC::BCLR || in createCRLogicalOpInfo()
551 if (CopySrc == PPC::CR0EQ || CopySrc == PPC::CR6EQ) in lookThroughCRCopy()
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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp161 return IsStore ? PPC::STW : PPC::LWZ; in selectLoadStoreOp()
163 return IsStore ? PPC::STD : PPC::LD; in selectLoadStoreOp()
171 return IsStore ? PPC::STFS : PPC::LFS; in selectLoadStoreOp()
173 return IsStore ? PPC::STFD : PPC::LFD; in selectLoadStoreOp()
201 unsigned ConvOp = IsSingle ? (IsSigned ? PPC::XSCVSXDSP : PPC::XSCVUXDSP) in selectIntToFP()
202 : (IsSigned ? PPC::XSCVSXDDP : PPC::XSCVUXDDP); in selectIntToFP()
230 unsigned ConvOp = IsSigned ? PPC::XSCVDPSXDS : PPC::XSCVDPUXDS; in selectFPToInt()
324 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
471 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
544 unsigned Opcode = ImmHi16 ? PPC::LIS8 : PPC::LI8; in selectI64ImmDirect()
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H A DPPCRegisterBankInfo.cpp36 case PPC::G8RCRegClassID: in getRegBankFromRegClass()
39 case PPC::GPRCRegClassID: in getRegBankFromRegClass()
43 case PPC::VSFRCRegClassID: in getRegBankFromRegClass()
47 case PPC::F8RCRegClassID: in getRegBankFromRegClass()
48 case PPC::VFRCRegClassID: in getRegBankFromRegClass()
50 case PPC::F4RCRegClassID: in getRegBankFromRegClass()
52 case PPC::VSRCRegClassID: in getRegBankFromRegClass()
53 case PPC::VRRCRegClassID: in getRegBankFromRegClass()
60 case PPC::CRRCRegClassID: in getRegBankFromRegClass()
228 const RegisterBank &DstRB = DstIsGPR ? PPC::GPRRegBank : PPC::VECRegBank; in getInstrMapping()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/
H A DPPCAsmParser.cpp892 TmpInst.setOpcode(Opcode == PPC::PLA ? PPC::PADDI : PPC::PADDI8); in ProcessInstruction()
902 TmpInst.setOpcode(Opcode == PPC::PLApc ? PPC::PADDIpc : PPC::PADDI8pc); in ProcessInstruction()
959 TmpInst.setOpcode(Opcode == PPC::EXTLWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
973 TmpInst.setOpcode(Opcode == PPC::EXTRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
987 TmpInst.setOpcode(Opcode == PPC::INSLWI ? PPC::RLWIMI : PPC::RLWIMI_rec); in ProcessInstruction()
1002 TmpInst.setOpcode(Opcode == PPC::INSRWI ? PPC::RLWIMI : PPC::RLWIMI_rec); in ProcessInstruction()
1029 TmpInst.setOpcode(Opcode == PPC::SLWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
1042 TmpInst.setOpcode(Opcode == PPC::SRWI ? PPC::RLWINM : PPC::RLWINM_rec); in ProcessInstruction()
1134 TmpInst.setOpcode(Opcode == PPC::SLDI ? PPC::RLDICR : PPC::RLDICR_rec); in ProcessInstruction()
1155 TmpInst.setOpcode(Opcode == PPC::SRDI ? PPC::RLDICL : PPC::RLDICL_rec); in ProcessInstruction()
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