Home
last modified time | relevance | path

Searched refs:MemVT (Results 1 – 25 of 41) sorted by relevance

12

/freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1470 EVT MemVT, MachineMemOperand *MMO)
1471 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) {
2355 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2451 : MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) {
2527 EVT MemVT, MachineMemOperand *MMO)
2557 AM, MemVT, MMO) {
2585 EVT MemVT, MachineMemOperand *MMO)
2622 VTs, AM, MemVT, MMO) {
2659 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) {
2728 EVT MemVT, MachineMemOperand *MMO)
[all …]
H A DSelectionDAG.h1297 EVT MemVT, MachinePointerInfo PtrInfo, Align Alignment,
1304 EVT MemVT, MachinePointerInfo PtrInfo,
1354 SDValue Chain, SDValue Ptr, EVT MemVT,
1367 EVT MemVT, MaybeAlign Alignment = MaybeAlign(),
1377 EVT MemVT, MachineMemOperand *MMO);
1423 EVT MemVT, Align Alignment,
1436 PtrInfo, MemVT, Alignment.value_or(getEVTAlign(MemVT)),
1441 SDValue Mask, SDValue EVL, EVT MemVT,
1458 EVT MemVT, MachineMemOperand *MMO,
1488 SDValue EVL, MachinePointerInfo PtrInfo, EVT MemVT,
[all …]
H A DTargetLowering.h639 virtual bool canMergeStoresTo(unsigned AS, EVT MemVT, in canMergeStoresTo() argument
1393 EVT MemVT) const { in getLoadExtAction() argument
1429 bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const { in isTruncStoreLegal() argument
1437 (getTruncStoreAction(ValVT, MemVT) == Legal || in isTruncStoreLegalOrCustom()
1438 getTruncStoreAction(ValVT, MemVT) == Custom); in isTruncStoreLegalOrCustom()
1441 virtual bool canCombineTruncStore(EVT ValVT, EVT MemVT, in canCombineTruncStore() argument
1444 return isTruncStoreLegal(ValVT, MemVT); in canCombineTruncStore()
1446 return isTruncStoreLegalOrCustom(ValVT, MemVT); in canCombineTruncStore()
2488 setLoadExtAction(ExtType, ValVT, MemVT, Action); in setLoadExtAction()
2492 for (auto MemVT : MemVTs) in setLoadExtAction() local
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.h49 bool canMergeStoresTo(unsigned AS, EVT MemVT,
57 bool canCombineTruncStore(EVT ValVT, EVT MemVT, in canCombineTruncStore() argument
63 return isTruncStoreLegal(ValVT, MemVT); in canCombineTruncStore()
H A DR600ISelLowering.cpp1041 EVT MemVT = Store->getMemoryVT(); in lowerPrivateTruncStore() local
1115 EVT MemVT = StoreNode->getMemoryVT(); in LowerSTORE() local
1157 if (MemVT == MVT::i8) { in LowerSTORE()
1160 assert(MemVT == MVT::i16); in LowerSTORE()
1207 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
1267 EVT MemVT = Load->getMemoryVT(); in lowerPrivateExtLoad() local
1301 EVT MemEltVT = MemVT.getScalarType(); in lowerPrivateExtLoad()
1321 EVT MemVT = LoadNode->getMemoryVT(); in LowerLOAD() local
1382 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8)); in LowerLOAD()
1476 EVT MemVT = VA.getLocVT(); in LowerFormalArguments() local
[all …]
H A DSIISelLowering.h52 SDValue lowerKernargMemParameter(SelectionDAG &DAG, EVT VT, EVT MemVT,
129 ArrayRef<SDValue> Ops, EVT MemVT,
143 SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Val,
179 EVT MemVT,
317 bool canMergeStoresTo(unsigned AS, EVT MemVT,
H A DAMDGPUISelLowering.cpp164 for (auto MemVT : in AMDGPUTargetLowering()
1149 EVT MemVT = ArgVT; in analyzeFormalArgumentsCompute() local
1160 MemVT = ArgVT; in analyzeFormalArgumentsCompute()
1168 MemVT = RegisterVT; in analyzeFormalArgumentsCompute()
1176 MemVT = RegisterVT; in analyzeFormalArgumentsCompute()
1197 if (MemVT.isVector() && MemVT.getVectorNumElements() == 1) in analyzeFormalArgumentsCompute()
1198 MemVT = MemVT.getScalarType(); in analyzeFormalArgumentsCompute()
1201 if (MemVT.isVector() && !MemVT.isPow2VectorType()) { in analyzeFormalArgumentsCompute()
1206 MemVT = MemVT.getPow2VectorType(State.getContext()); in analyzeFormalArgumentsCompute()
1207 } else if (!MemVT.isSimple() && !MemVT.isVector()) { in analyzeFormalArgumentsCompute()
[all …]
H A DSIISelLowering.cpp1964 VT.bitsLT(MemVT)) { in convertArgType()
1969 if (MemVT.isFloatingPoint()) in convertArgType()
2045 MVT MemVT = VA.getValVT(); in lowerStackParameter() local
2051 MemVT = VA.getLocVT(); in lowerStackParameter()
2067 MemVT); in lowerStackParameter()
2860 EVT MemVT = VA.getLocVT(); in LowerFormalArguments() local
10082 if (!MemVT.isVector()) { in LowerLOAD()
10107 if (!MemVT.isVector()) in LowerLOAD()
10116 Alignment.value() < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) { in LowerLOAD()
10208 if (MemVT.isVector()) in LowerLOAD()
[all …]
H A DAMDGPUISelLowering.h225 bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT,
/freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8239 ID.AddInteger(MemVT.getRawBits()); in getAtomic()
8331 Size = MemVT.getStoreSize(); in getMemIntrinsicNode()
8504 if (VT == MemVT) { in getLoad()
8529 ID.AddInteger(MemVT.getRawBits()); in getLoad()
8583 MemVT, MMO); in getExtLoad()
8785 ID.AddInteger(MemVT.getRawBits()); in getLoadVP()
8878 ID.AddInteger(MemVT.getRawBits()); in getStoreVP()
9132 ID.AddInteger(MemVT.getRawBits()); in getStridedStoreVP()
9355 ID.AddInteger(MemVT.getRawBits()); in getMaskedLoad()
9403 ID.AddInteger(MemVT.getRawBits()); in getMaskedStore()
[all …]
H A DDAGCombiner.cpp6461 if (!MemVT.isRound()) in isLegalNarrowLdSt()
8888 if (!(MemVT == MVT::i8 || MemVT == MVT::i16 || MemVT == MVT::i32) || in mergeTruncStores()
9195 EVT MemVT = in MatchLoadCombine() local
9198 if (!MemVT.isSimple()) in MatchLoadCombine()
19863 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1; in mergeStoresOfConstantsOrVecElts()
20067 if (MemVT != LoadVT) in getStoreMergeCandidates()
20090 bool NoTypeMatch = (MemVT.isInteger()) ? !MemVT.bitsEq(Other->getMemoryVT()) in getStoreMergeCandidates()
20324 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1; in tryStoreMergeOfConstants()
20451 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1; in tryStoreMergeOfExtracts()
20524 unsigned NumMemElts = MemVT.isVector() ? MemVT.getVectorNumElements() : 1; in tryStoreMergeOfLoads()
[all …]
H A DLegalizeVectorTypes.cpp1230 if (MemVT.isScalableVector()) { in IncrementPointer()
6920 for (EVT MemVT : reverse(MVT::integer_valuetypes())) { in findMemType() local
6921 unsigned MemVTWidth = MemVT.getSizeInBits(); in findMemType()
6922 if (MemVT.getSizeInBits() <= WidenEltWidth) in findMemType()
6932 return MemVT; in findMemType()
6933 RetVT = MemVT; in findMemType()
6941 for (EVT MemVT : reverse(MVT::vector_valuetypes())) { in findMemType() local
6943 if (Scalable != MemVT.isScalableVector()) in findMemType()
6949 WidenEltVT == MemVT.getVectorElementType() && in findMemType()
6955 return MemVT; in findMemType()
[all …]
H A DSelectionDAGBuilder.cpp2730 if (CondLHS.getValueType() != MemVT) { in visitSwitchCase()
3454 EVT MemVT = in visitICmp() local
3460 if (Op1.getValueType() != MemVT) { in visitICmp()
4902 DAG.getAtomic(NT, dl, MemVT, InChain, in visitAtomicRMW()
4938 I.getAlign().value() < MemVT.getSizeInBits() / 8) in visitAtomicLoad()
4950 SDValue L = DAG.getAtomic(ISD::ATOMIC_LOAD, dl, MemVT, MemVT, InChain, in visitAtomicLoad()
4954 if (MemVT != VT) in visitAtomicLoad()
4970 EVT MemVT = in visitAtomicStore() local
4974 I.getAlign().value() < MemVT.getSizeInBits() / 8) in visitAtomicStore()
4985 if (Val.getValueType() != MemVT) in visitAtomicStore()
[all …]
H A DLegalizeDAG.cpp521 EVT MemVT = ST->getMemoryVT(); in LegalizeStoreOps() local
523 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
632 EVT MemVT = ST->getMemoryVT(); in LegalizeStoreOps() local
635 if (!TLI.allowsMemoryAccessForAlignment(*DAG.getContext(), DL, MemVT, in LegalizeStoreOps()
693 EVT MemVT = LD->getMemoryVT(); in LegalizeLoadOps() local
880 EVT MemVT = LD->getMemoryVT(); in LegalizeLoadOps() local
882 if (!TLI.allowsMemoryAccess(*DAG.getContext(), DL, MemVT, in LegalizeLoadOps()
1506 EVT MemVT = isa<BuildVectorSDNode>(Node) ? VT.getVectorElementType() in ExpandVectorBuildThroughStack() local
1516 unsigned TypeByteSize = MemVT.getSizeInBits() / 8; in ExpandVectorBuildThroughStack()
1522 MemVT.bitsLT(Node->getOperand(0).getValueType()); in ExpandVectorBuildThroughStack()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1380 EVT MemVT = LdNode->getMemoryVT(); in lowerLoadI1() local
1381 if (MemVT == MVT::v256i1 || MemVT == MVT::v4i64) { in lowerLoadI1()
1402 } else if (MemVT == MVT::v512i1 || MemVT == MVT::v8i64) { in lowerLoadI1()
1434 if (Subtarget->enableVPU() && MemVT.isVector() && !isMaskType(MemVT)) in lowerLOAD()
1444 if (MemVT == MVT::f128) in lowerLOAD()
1446 if (isMaskType(MemVT)) in lowerLOAD()
1505 if (MemVT == MVT::v256i1 || MemVT == MVT::v4i64) { in lowerStoreI1()
1520 } else if (MemVT == MVT::v512i1 || MemVT == MVT::v8i64) { in lowerStoreI1()
1547 if (Subtarget->enableVPU() && MemVT.isVector() && !isMaskType(MemVT)) in lowerSTORE()
1557 if (MemVT == MVT::f128) in lowerSTORE()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1099 bool mergeStoresAfterLegalization(EVT MemVT) const override { in mergeStoresAfterLegalization() argument
1100 return !MemVT.isVector(); in mergeStoresAfterLegalization()
1103 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT,
1458 bool storeOfVectorConstantIsCheap(bool IsZero, EVT MemVT, unsigned NumElem, in storeOfVectorConstantIsCheap() argument
H A DX86ISelDAGToDAG.cpp1374 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT); in PreprocessISelDAG()
1430 SDValue MemTmp = CurDAG->CreateStackTemporary(MemVT); in PreprocessISelDAG()
1452 assert(SrcVT == MemVT && "Unexpected VT!"); in PreprocessISelDAG()
1461 X86ISD::FLD, dl, VTs, Ops, MemVT, MPI, in PreprocessISelDAG()
1469 assert(DstVT == MemVT && "Unexpected VT!"); in PreprocessISelDAG()
3503 EVT MemVT = StoreNode->getMemoryVT(); in foldLoadStoreIntoMemOperand() local
3504 if (MemVT != MVT::i64 && MemVT != MVT::i32 && MemVT != MVT::i16 && in foldLoadStoreIntoMemOperand()
3505 MemVT != MVT::i8) in foldLoadStoreIntoMemOperand()
3549 switch (MemVT.getSimpleVT().SimpleTy) { in foldLoadStoreIntoMemOperand()
3666 (MemVT == MVT::i64 && !isInt<32>(OperandV) && in foldLoadStoreIntoMemOperand()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp1386 EVT MemVT = StoreNode->getMemoryVT(); in tryFoldLoadStoreIntoMemOperand() local
1396 if (MemVT == MVT::i32) in tryFoldLoadStoreIntoMemOperand()
1398 else if (MemVT == MVT::i64) in tryFoldLoadStoreIntoMemOperand()
1407 if (MemVT == MVT::i32) in tryFoldLoadStoreIntoMemOperand()
1409 else if (MemVT == MVT::i64) in tryFoldLoadStoreIntoMemOperand()
1431 Operand = CurDAG->getTargetConstant(OperandV, DL, MemVT); in tryFoldLoadStoreIntoMemOperand()
H A DSystemZISelLowering.cpp4645 EVT MemVT = Node->getMemoryVT(); in lowerATOMIC_LOAD_SUB() local
4646 if (MemVT == MVT::i32 || MemVT == MVT::i64) { in lowerATOMIC_LOAD_SUB()
4648 assert(Op.getValueType() == MemVT && "Mismatched VTs"); in lowerATOMIC_LOAD_SUB()
4654 DAG.getNode(ISD::SUB, DL, MemVT, DAG.getConstant(0, DL, MemVT), Src2); in lowerATOMIC_LOAD_SUB()
4655 return DAG.getAtomic(ISD::ATOMIC_LOAD_ADD, DL, MemVT, in lowerATOMIC_LOAD_SUB()
6913 EVT MemVT = SN->getMemoryVT(); in combineSTORE() local
6918 if (MemVT.isInteger() && SN->isTruncatingStore()) { in combineSTORE()
6946 Ops, MemVT, SN->getMemOperand()); in combineSTORE()
7002 isInt<16>(C->getSExtValue()) || MemVT.getStoreSize() <= 2) in combineSTORE()
7047 FindReplicatedImm(C, MemVT.getStoreSize()); in combineSTORE()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5654 MemVT = MemVT.changeVectorElementTypeToInteger(); in LowerMGATHER()
5676 MemVT = ContainerVT.changeVectorElementType(MemVT.getVectorElementType()); in LowerMGATHER()
5743 MemVT = MemVT.changeVectorElementTypeToInteger(); in LowerMSCATTER()
5767 MemVT = ContainerVT.changeVectorElementType(MemVT.getVectorElementType()); in LowerMSCATTER()
5870 MemVT == MVT::v4i8) { in LowerSTORE()
6834 MemVT = VA.getLocVT(); in LowerFormalArguments()
17769 EVT MemVT; in performSVEAndCombine() local
21272 if (MemVT.isScalableVector() || MemVT.getSizeInBits() <= 256 || in performLOADCombine()
25780 MemVT = MemVT.changeTypeToInteger(); in LowerFixedLengthVectorLoadToSVE()
25890 MemVT = MemVT.changeTypeToInteger(); in LowerFixedLengthVectorStoreToSVE()
[all …]
H A DAArch64ISelLowering.h819 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT, in canMergeStoresTo() argument
827 return (MemVT.getSizeInBits() <= 64); in canMergeStoresTo()
H A DAArch64SVEInstrInfo.td2907 SDPatternOperator Load, ValueType PredTy, ValueType MemVT, ComplexPattern AddrCP> {
2910 def : Pat<(Ty (Load (PredTy PPR:$gp), (AddrCP GPR64:$base, GPR64:$offset), MemVT)),
2916 …def : Pat<(Ty (Load (PredTy PPR:$gp), (am_sve_indexed_s4 GPR64sp:$base, simm4s1:$offset), MemVT)),
2921 def : Pat<(Ty (Load (PredTy PPR:$gp), GPR64:$base, MemVT)),
2958 …def : Pat<(Ty (Load (PredTy PPR:$gp), (am_sve_indexed_s4 GPR64sp:$base, simm4s1:$offset), MemVT)),
2963 def : Pat<(Ty (Load (PredTy PPR:$gp), GPR64:$base, MemVT)),
2998 def : Pat<(Ty (Load (PredTy PPR:$gp), (AddrCP GPR64:$base, GPR64:$offset), MemVT)),
3003 def : Pat<(Ty (Load (PredTy PPR:$gp), GPR64:$base, MemVT)),
3039 … SDPatternOperator Store, ValueType PredTy, ValueType MemVT, ComplexPattern AddrCP> {
3042 def : Pat<(Store (Ty ZPR:$vec), (AddrCP GPR64:$base, GPR64:$offset), (PredTy PPR:$gp), MemVT),
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h690 bool canMergeStoresTo(unsigned AddressSpace, EVT MemVT, in canMergeStoresTo() argument
693 return (MemVT.getSizeInBits() <= 32); in canMergeStoresTo()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp2673 EVT VT = LD->getValueType(0), MemVT = LD->getMemoryVT(); in createLoadLR() local
2683 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createLoadLR()
2690 EVT MemVT = LD->getMemoryVT(); in lowerLOAD() local
2696 if ((LD->getAlign().value() >= (MemVT.getSizeInBits() / 8)) || in lowerLOAD()
2697 ((MemVT != MVT::i32) && (MemVT != MVT::i64))) in lowerLOAD()
2755 EVT MemVT = SD->getMemoryVT(), BasePtrVT = Ptr.getValueType(); in createStoreLR() local
2764 return DAG.getMemIntrinsicNode(Opc, DL, VTList, Ops, MemVT, in createStoreLR()
2816 EVT MemVT = SD->getMemoryVT(); in lowerSTORE() local
2820 (SD->getAlign().value() < (MemVT.getSizeInBits() / 8)) && in lowerSTORE()
2821 ((MemVT == MVT::i32) || (MemVT == MVT::i64))) in lowerSTORE()
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3007 EVT MemVT = LD->getMemoryVT(); in usePartialVectorLoads() local
3008 if (!MemVT.isSimple()) in usePartialVectorLoads()
8435 if (LD->getMemoryVT() != MemVT) in canReuseLoadAddress()
9305 if (MemVT == MVT::i32) { in isValidSplatLoad()
11035 if (MemVT.getSizeInBits() >= 32) in LowerATOMIC_CMP_SWAP()
11065 EVT MemVT = N->getMemoryVT(); in LowerATOMIC_LOAD_STORE() local
17196 if ((MemVT == MVT::i1 || MemVT == MVT::i8 || MemVT == MVT::i16 || in isZExtFree()
18152 EVT MemVT = MN->getMemoryVT(); in computeMOFlags() local
18154 if (MemVT.isScalarInteger()) { in computeMOFlags()
18163 } else if (MemVT.isVector() && !MemVT.isFloatingPoint()) { // Integer vectors. in computeMOFlags()
[all …]

12