Lines Matching refs:MemVT
1041 EVT MemVT = Store->getMemoryVT(); in lowerPrivateTruncStore() local
1074 SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT); in lowerPrivateTruncStore()
1115 EVT MemVT = StoreNode->getMemoryVT(); in LowerSTORE() local
1131 NewChain, DL, Value, Ptr, StoreNode->getPointerInfo(), MemVT, in LowerSTORE()
1141 if (Alignment < MemVT.getStoreSize() && in LowerSTORE()
1142 !allowsMisalignedMemoryAccesses(MemVT, AS, Alignment, in LowerSTORE()
1157 if (MemVT == MVT::i8) { in LowerSTORE()
1160 assert(MemVT == MVT::i16); in LowerSTORE()
1188 Op->getVTList(), Args, MemVT, in LowerSTORE()
1207 if (MemVT.bitsLT(MVT::i32)) in LowerSTORE()
1267 EVT MemVT = Load->getMemoryVT(); in lowerPrivateExtLoad() local
1268 assert(Load->getAlign() >= MemVT.getStoreSize()); in lowerPrivateExtLoad()
1301 EVT MemEltVT = MemVT.getScalarType(); in lowerPrivateExtLoad()
1321 EVT MemVT = LoadNode->getMemoryVT(); in LowerLOAD() local
1325 ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) { in LowerLOAD()
1382 assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8)); in LowerLOAD()
1384 ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT, in LowerLOAD()
1387 DAG.getValueType(MemVT)); in LowerLOAD()
1476 EVT MemVT = VA.getLocVT(); in LowerFormalArguments() local
1477 if (!VT.isVector() && MemVT.isVector()) { in LowerFormalArguments()
1479 MemVT = MemVT.getVectorElementType(); in LowerFormalArguments()
1497 if (MemVT.getScalarSizeInBits() != VT.getScalarSizeInBits()) { in LowerFormalArguments()
1517 MemVT, Alignment, MachineMemOperand::MONonTemporal | in LowerFormalArguments()
1533 bool R600TargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT, in canMergeStoresTo() argument
1537 return (MemVT.getSizeInBits() <= 32); in canMergeStoresTo()