1616 bool SITargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,  in canMergeStoresTo()  argument
1619     return (MemVT.getSizeInBits() <= 4 * 32);  in canMergeStoresTo()
1622     return (MemVT.getSizeInBits() <= MaxPrivateBits);  in canMergeStoresTo()
1624     return (MemVT.getSizeInBits() <= 2 * 32);  in canMergeStoresTo()
1948 SDValue SITargetLowering::convertArgType(SelectionDAG &DAG, EVT VT, EVT MemVT,  in convertArgType()  argument
1954       VT.getVectorNumElements() != MemVT.getVectorNumElements()) {  in convertArgType()
1956         EVT::getVectorVT(*DAG.getContext(), MemVT.getVectorElementType(),  in convertArgType()
1964       VT.bitsLT(MemVT)) {  in convertArgType()
1966     Val = DAG.getNode(Opc, SL, MemVT, Val, DAG.getValueType(VT));  in convertArgType()
1969   if (MemVT.isFloatingPoint())  in convertArgType()
1980     SelectionDAG &DAG, EVT VT, EVT MemVT, const SDLoc &SL, SDValue Chain,  in lowerKernargMemParameter()  argument
1988   if (MemVT.getStoreSize() < 4 && Alignment < 4) {  in lowerKernargMemParameter()
1993     EVT IntVT = MemVT.changeTypeToInteger();  in lowerKernargMemParameter()
2006     ArgVal = DAG.getNode(ISD::BITCAST, SL, MemVT, ArgVal);  in lowerKernargMemParameter()
2007     ArgVal = convertArgType(DAG, VT, MemVT, SL, ArgVal, Signed, Arg);  in lowerKernargMemParameter()
2014   SDValue Load = DAG.getLoad(MemVT, SL, Chain, Ptr, PtrInfo, Alignment,  in lowerKernargMemParameter()
2018   SDValue Val = convertArgType(DAG, VT, MemVT, SL, Load, Signed, Arg);  in lowerKernargMemParameter()
2045   MVT MemVT = VA.getValVT();  in lowerStackParameter()  local
2051     MemVT = VA.getLocVT();  in lowerStackParameter()
2067     MemVT);  in lowerStackParameter()
2860       EVT MemVT = VA.getLocVT();  in LowerFormalArguments()  local
2882         if (MemVT.getStoreSize() < 4 && Alignment < 4) {  in LowerFormalArguments()
2886           EVT IntVT = MemVT.changeTypeToInteger();  in LowerFormalArguments()
2902           ArgVal = DAG.getNode(ISD::BITCAST, DL, MemVT, ArgVal);  in LowerFormalArguments()
2903           NewArg = convertArgType(DAG, VT, MemVT, DL, ArgVal,  in LowerFormalArguments()
2942             CMemVT = DAG.getNode(ISD::TRUNCATE, DL, MemVT, NewArg);  in LowerFormalArguments()
2944             CMemVT = DAG.getBitcast(MemVT, NewArg);  in LowerFormalArguments()
2945           NewArg = convertArgType(DAG, VT, MemVT, DL, CMemVT,  in LowerFormalArguments()
2951             lowerKernargMemParameter(DAG, VT, MemVT, DL, Chain, Offset,  in LowerFormalArguments()
8359   EVT MemVT = VData.getValueType();  in lowerRawBufferAtomicIntrin()  local
8360   return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,  in lowerRawBufferAtomicIntrin()
8393   EVT MemVT = VData.getValueType();  in lowerStructBufferAtomicIntrin()  local
8394   return DAG.getMemIntrinsicNode(NewOpcode, DL, Op->getVTList(), Ops, MemVT,  in lowerStructBufferAtomicIntrin()
9124                                               ArrayRef<SDValue> Ops, EVT MemVT,  in getMemIntrinsicNode()  argument
9158     EVT WidenedMemVT = EVT::getVectorVT(C, MemVT.getVectorElementType(), 4);  in getMemIntrinsicNode()
9168   return DAG.getMemIntrinsicNode(Opcode, DL, VTList, Ops, MemVT, MMO);  in getMemIntrinsicNode()
10000   EVT MemVT = Ld->getMemoryVT();  in widenLoad()  local
10001   if ((MemVT.isSimple() && !DCI.isAfterLegalizeDAG()) ||  in widenLoad()
10002       MemVT.getSizeInBits() >= 32)  in widenLoad()
10007   assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) &&  in widenLoad()
10018   EVT TruncVT = EVT::getIntegerVT(*DAG.getContext(), MemVT.getSizeInBits());  in widenLoad()
10019   if (MemVT.isFloatingPoint()) {  in widenLoad()
10022     TruncVT = MemVT.changeTypeToInteger();  in widenLoad()
10064   EVT MemVT = Load->getMemoryVT();  in LowerLOAD()  local
10066   if (ExtType == ISD::NON_EXTLOAD && MemVT.getSizeInBits() < 32) {  in LowerLOAD()
10067     if (MemVT == MVT::i16 && isTypeLegal(MVT::i16))  in LowerLOAD()
10077     EVT RealMemVT = (MemVT == MVT::i1) ? MVT::i8 : MVT::i16;  in LowerLOAD()
10082     if (!MemVT.isVector()) {  in LowerLOAD()
10084         DAG.getNode(ISD::TRUNCATE, DL, MemVT, NewLD),  in LowerLOAD()
10092     for (unsigned I = 0, N = MemVT.getVectorNumElements(); I != N; ++I) {  in LowerLOAD()
10100       DAG.getBuildVector(MemVT, DL, Elts),  in LowerLOAD()
10107   if (!MemVT.isVector())  in LowerLOAD()
10116       Alignment.value() < MemVT.getStoreSize() && MemVT.getSizeInBits() > 32) {  in LowerLOAD()
10129   unsigned NumElements = MemVT.getVectorNumElements();  in LowerLOAD()
10134       if (MemVT.isPow2VectorType() ||  in LowerLOAD()
10151       if (MemVT.isPow2VectorType() ||  in LowerLOAD()
10203     if (allowsMisalignedMemoryAccessesImpl(MemVT.getSizeInBits(), AS,  in LowerLOAD()
10208     if (MemVT.isVector())  in LowerLOAD()
10213                                       MemVT, *Load->getMemOperand())) {  in LowerLOAD()
11115                                                EVT MemVT,  in performSHLPtrCombine()  argument
11143   Type *Ty = MemVT.getTypeForEVT(*DCI.DAG.getContext());  in performSHLPtrCombine()
11859       auto MemVT = L->getMemoryVT();  in isExtendedFrom16Bits()  local
11860       return !MemVT.isVector() && MemVT.getSizeInBits() == 16;  in isExtendedFrom16Bits()