| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86TargetTransformInfo.cpp | 2120 { ISD::SIGN_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
2121 { ISD::ZERO_EXTEND, MVT::v32i16, MVT::v32i8, 1 }, in getCastInstrCost()
2124 { ISD::SIGN_EXTEND, MVT::v2i8, MVT::v2i1, 1 }, in getCastInstrCost()
2125 { ISD::SIGN_EXTEND, MVT::v16i8, MVT::v2i1, 1 }, in getCastInstrCost()
2126 { ISD::SIGN_EXTEND, MVT::v2i16, MVT::v2i1, 1 }, in getCastInstrCost()
2233 { ISD::FP_EXTEND, MVT::v8f64, MVT::v8f32, 1 }, in getCastInstrCost()
2234 { ISD::FP_EXTEND, MVT::v8f64, MVT::v16f32, 3 }, in getCastInstrCost()
2236 { ISD::FP_ROUND, MVT::v8f32, MVT::v8f64, 1 }, in getCastInstrCost()
2274 { ISD::TRUNCATE, MVT::v32i8, MVT::v32i16, 8 }, in getCastInstrCost()
2275 { ISD::TRUNCATE, MVT::v64i8, MVT::v32i16, 8 }, in getCastInstrCost()
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| H A D | X86ISelLowering.cpp | 291 for (MVT VT : { MVT::i8, MVT::i16, MVT::i32 }) { in X86TargetLowering()
327 for (auto VT : { MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
338 for (auto VT : { MVT::f32, MVT::f64, MVT::f80, MVT::f128, in X86TargetLowering()
339 MVT::i8, MVT::i16, MVT::i32, MVT::i64 }) { in X86TargetLowering()
387 for (auto VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64}) { in X86TargetLowering()
409 for (MVT VT : {MVT::f32, MVT::f64, MVT::f80, MVT::f128}) { in X86TargetLowering()
1261 for (MVT RoundedTy : {MVT::f32, MVT::f64, MVT::v4f32, MVT::v2f64}) { in X86TargetLowering()
1580 for (MVT VT : { MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64, in X86TargetLowering()
1616 for (MVT VT : { MVT::f16, MVT::v2f16, MVT::v4f16, MVT::v8f16 }) { in X86TargetLowering()
1620 for (MVT VT : { MVT::f32, MVT::v2f32, MVT::v4f32, MVT::v8f32 }) { in X86TargetLowering()
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| /freebsd-14.2/contrib/llvm-project/llvm/utils/TableGen/ |
| H A D | CodeGenTarget.cpp | 52 case MVT::Other: return "UNKNOWN"; in getName()
63 case MVT::i1: return "MVT::i1"; in getEnumName()
64 case MVT::i2: return "MVT::i2"; in getEnumName()
65 case MVT::i4: return "MVT::i4"; in getEnumName()
66 case MVT::i8: return "MVT::i8"; in getEnumName()
67 case MVT::i16: return "MVT::i16"; in getEnumName()
68 case MVT::i32: return "MVT::i32"; in getEnumName()
69 case MVT::i64: return "MVT::i64"; in getEnumName()
71 case MVT::Any: return "MVT::Any"; in getEnumName()
75 case MVT::f16: return "MVT::f16"; in getEnumName()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ValueTypes.cpp | 581 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT()
585 if (HandleUnknown) return MVT(MVT::Other); in getVT()
591 case Type::HalfTyID: return MVT(MVT::f16); in getVT()
592 case Type::BFloatTyID: return MVT(MVT::bf16); in getVT()
593 case Type::FloatTyID: return MVT(MVT::f32); in getVT()
594 case Type::DoubleTyID: return MVT(MVT::f64); in getVT()
595 case Type::X86_FP80TyID: return MVT(MVT::f80); in getVT()
600 return MVT(MVT::aarch64svcount); in getVT()
602 return MVT(MVT::spirvbuiltin); in getVT()
604 return MVT(MVT::Other); in getVT()
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| H A D | TargetLoweringBase.cpp | 787 for (MVT VT : {MVT::i2, MVT::i4}) in initActions()
790 for (MVT AVT : MVT::all_valuetypes()) { in initActions()
791 for (MVT VT : {MVT::i2, MVT::i4, MVT::v128i2, MVT::v64i4}) { in initActions()
799 for (MVT VT : {MVT::i2, MVT::i4}) { in initActions()
807 for (MVT VT : MVT::fp_valuetypes()) { in initActions()
816 for (MVT VT : MVT::all_valuetypes()) { in initActions()
931 {MVT::bf16, MVT::f16, MVT::f32, MVT::f64, MVT::f80, MVT::f128}, in initActions()
939 {MVT::f32, MVT::f64, MVT::f128}, Expand); in initActions()
953 for (MVT VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64}) { in initActions()
1406 TransformToType[MVT::f80] = MVT::i32; in computeRegisterProperties()
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| /freebsd-14.2/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineValueType.h | 34 class MVT {
194 MVT IntTy = MVT::getIntegerVT(EltTy.getSizeInBits()); in changeVectorElementTypeToInteger()
195 MVT VecTy = MVT::getVectorVT(IntTy, getVectorElementCount()); in changeVectorElementTypeToInteger()
203 MVT changeVectorElementType(MVT EltVT) const { in changeVectorElementType()
204 MVT VecTy = MVT::getVectorVT(EltVT, getVectorElementCount()); in changeVectorElementType()
444 return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); in getIntegerVT()
447 static MVT getVectorVT(MVT VT, unsigned NumElements) { in getVectorVT()
454 return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); in getVectorVT()
457 static MVT getScalableVectorVT(MVT VT, unsigned NumElements) { in getScalableVectorVT()
464 return (MVT::SimpleValueType)(MVT::INVALID_SIMPLE_VALUE_TYPE); in getScalableVectorVT()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetTransformInfo.cpp | 606 { ISD::ADD, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
607 { ISD::ADD, MVT::v8i16, MVT::v8i8, 0 }, in getCastInstrCost()
609 { ISD::SUB, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
610 { ISD::SUB, MVT::v8i16, MVT::v8i8, 0 }, in getCastInstrCost()
612 { ISD::MUL, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
613 { ISD::MUL, MVT::v8i16, MVT::v8i8, 0 }, in getCastInstrCost()
615 { ISD::SHL, MVT::v4i32, MVT::v4i16, 0 }, in getCastInstrCost()
616 { ISD::SHL, MVT::v8i16, MVT::v8i8, 0 }, in getCastInstrCost()
740 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
741 { ISD::FP_TO_UINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
[all …]
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| H A D | ARMCallingConv.h | 20 bool CC_ARM_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
23 bool CC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT, MVT LocVT,
26 bool CC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
29 bool CC_ARM_APCS_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
32 bool FastCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
35 bool CC_ARM_Win32_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
38 bool RetCC_ARM_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
41 bool RetCC_ARM_AAPCS_VFP(unsigned ValNo, MVT ValVT, MVT LocVT,
44 bool RetCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
47 bool RetFastCC_ARM_APCS(unsigned ValNo, MVT ValVT, MVT LocVT,
|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetTransformInfo.cpp | 512 static const auto ValidMinMaxTys = {MVT::v8i8, MVT::v16i8, MVT::v4i16, in getIntrinsicInstrCost()
513 MVT::v8i16, MVT::v2i32, MVT::v4i32, in getIntrinsicInstrCost()
514 MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, in getIntrinsicInstrCost()
528 static const auto ValidSatTys = {MVT::v8i8, MVT::v16i8, MVT::v4i16, in getIntrinsicInstrCost()
529 MVT::v8i16, MVT::v2i32, MVT::v4i32, in getIntrinsicInstrCost()
541 static const auto ValidAbsTys = {MVT::v8i8, MVT::v16i8, MVT::v4i16, in getIntrinsicInstrCost()
542 MVT::v8i16, MVT::v2i32, MVT::v4i32, in getIntrinsicInstrCost()
550 static const auto ValidAbsTys = {MVT::v4i16, MVT::v8i16, MVT::v2i32, in getIntrinsicInstrCost()
2997 MVT::v8i8, MVT::v16i8, MVT::v4i16, MVT::v8i16, MVT::v2i32, in getCmpSelInstrCost()
2998 MVT::v4i32, MVT::v2i64, MVT::v2f32, MVT::v4f32, MVT::v2f64}; in getCmpSelInstrCost()
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| H A D | AArch64ISelDAGToDAG.cpp | 705 if (VT != MVT::i32 && VT != MVT::i64) in SelectShiftedRegisterFromAnd()
1670 if (EltVT != MVT::i8 && EltVT != MVT::i16 && EltVT != MVT::i32 && in SelectOpcodeFromVT()
1679 if (EltVT != MVT::f16 && EltVT != MVT::f32 && EltVT != MVT::f64) in SelectOpcodeFromVT()
3090 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOrAndImm()
3354 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertOpFromOr()
3550 if (VT != MVT::i32 && VT != MVT::i64) in tryBitfieldInsertInZeroOp()
3955 MVT RegTy = MemTy == MVT::i64 ? MVT::i64 : MVT::i32; in SelectCMP_SWAP()
6425 } else if (VT == MVT::v8i16 || VT == MVT::v4i16 || VT == MVT::v4f16 || in Select()
6429 } else if (VT == MVT::v4i32 || VT == MVT::v2i32 || VT == MVT::v4f32 || in Select()
6433 } else if (VT == MVT::v2i64 || VT == MVT::v1i64 || VT == MVT::v2f64 || in Select()
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| H A D | AArch64CallingConvention.h | 19 bool CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
22 bool CC_AArch64_Arm64EC_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
25 bool CC_AArch64_Arm64EC_Thunk(unsigned ValNo, MVT ValVT, MVT LocVT,
28 bool CC_AArch64_Arm64EC_Thunk_Native(unsigned ValNo, MVT ValVT, MVT LocVT,
31 bool CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
34 bool CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
40 bool CC_AArch64_Win64PCS(unsigned ValNo, MVT ValVT, MVT LocVT,
43 bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
52 bool CC_AArch64_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
55 bool RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
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| H A D | AArch64FastISel.cpp | 396 if (VT != MVT::f32 && VT != MVT::f64) in materializeFP()
568 if (VT != MVT::f32 && VT != MVT::f64) in fastMaterializeFloatZero()
1018 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16) in isTypeSupported()
2872 if (SrcVT == MVT::i16 || SrcVT == MVT::i8 || SrcVT == MVT::i1) { in selectIntToFP()
3194 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)) in fastLowerCall()
3903 if (RVVT != MVT::i1 && RVVT != MVT::i8 && RVVT != MVT::i16) in selectRet()
3950 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16 && in selectTrunc()
3953 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8 && in selectTrunc()
4095 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSL_ri()
4198 assert((SrcVT == MVT::i1 || SrcVT == MVT::i8 || SrcVT == MVT::i16 || in emitLSR_ri()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/Utils/ |
| H A D | WebAssemblyTypeUtilities.cpp | 41 case MVT::i32: in toValType()
43 case MVT::i64: in toValType()
45 case MVT::f32: in toValType()
47 case MVT::f64: in toValType()
49 case MVT::v16i8: in toValType()
50 case MVT::v8i16: in toValType()
51 case MVT::v4i32: in toValType()
52 case MVT::v2i64: in toValType()
53 case MVT::v4f32: in toValType()
54 case MVT::v2f64: in toValType()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kExpandPseudo.cpp | 84 return TII->ExpandMOVX_RR(MIB, MVT::i16, MVT::i8); in INITIALIZE_PASS()
86 return TII->ExpandMOVX_RR(MIB, MVT::i32, MVT::i8); in INITIALIZE_PASS()
88 return TII->ExpandMOVX_RR(MIB, MVT::i32, MVT::i16); in INITIALIZE_PASS()
91 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i16, MVT::i8); in INITIALIZE_PASS()
93 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i32, MVT::i8); in INITIALIZE_PASS()
95 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i32, MVT::i16); in INITIALIZE_PASS()
98 return TII->ExpandMOVSZX_RR(MIB, false, MVT::i16, MVT::i8); in INITIALIZE_PASS()
100 return TII->ExpandMOVSZX_RR(MIB, false, MVT::i32, MVT::i8); in INITIALIZE_PASS()
102 return TII->ExpandMOVSZX_RR(MIB, false, MVT::i32, MVT::i16); in INITIALIZE_PASS()
106 MVT::i8); in INITIALIZE_PASS()
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|
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 165 {MVT::v2i8, MVT::v4i8, MVT::v2i16, MVT::v3i16, MVT::v4i16}) in AMDGPUTargetLowering()
375 {MVT::v2f16, MVT::v3f16, MVT::v4f16, MVT::v16f16, MVT::v2f32, MVT::v3f32, in AMDGPUTargetLowering()
376 MVT::v4f32, MVT::v5f32, MVT::v6f32, MVT::v7f32, MVT::v8f32, MVT::v16f32, in AMDGPUTargetLowering()
377 MVT::v2f64, MVT::v3f64, MVT::v4f64, MVT::v8f64, MVT::v16f64}, in AMDGPUTargetLowering()
394 {MVT::v2f16, MVT::v2bf16, MVT::v2i16, MVT::v4f16, MVT::v4bf16, in AMDGPUTargetLowering()
395 MVT::v4i16, MVT::v2f32, MVT::v2i32, MVT::v3f32, MVT::v3i32, in AMDGPUTargetLowering()
396 MVT::v4f32, MVT::v4i32, MVT::v5f32, MVT::v5i32, MVT::v6f32, in AMDGPUTargetLowering()
397 MVT::v6i32, MVT::v7f32, MVT::v7i32, MVT::v8f32, MVT::v8i32, in AMDGPUTargetLowering()
401 MVT::v2f64, MVT::v2i64, MVT::v3f64, MVT::v3i64, MVT::v4f64, in AMDGPUTargetLowering()
453 MVT::v2i32, MVT::v3i32, MVT::v4i32, MVT::v5i32, MVT::v6i32, MVT::v7i32, in AMDGPUTargetLowering()
[all …]
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| H A D | R600ISelLowering.cpp | 46 setOperationAction(ISD::LOAD, {MVT::i32, MVT::v2i32, MVT::v4i32}, Custom); in R600TargetLowering()
51 for (MVT VT : MVT::integer_valuetypes()) { in R600TargetLowering()
64 setOperationAction(ISD::STORE, {MVT::i8, MVT::i32, MVT::v2i32, MVT::v4i32}, in R600TargetLowering()
67 setTruncStoreAction(MVT::i32, MVT::i8, Custom); in R600TargetLowering()
68 setTruncStoreAction(MVT::i32, MVT::i16, Custom); in R600TargetLowering()
76 setTruncStoreAction(MVT::v2i32, MVT::v2i8, Custom); in R600TargetLowering()
77 setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom); in R600TargetLowering()
113 setOperationAction(ISD::SELECT, {MVT::i32, MVT::f32, MVT::v2i32, MVT::v4i32}, in R600TargetLowering()
146 {MVT::v2i32, MVT::v2f32, MVT::v4i32, MVT::v4f32}, Custom); in R600TargetLowering()
149 {MVT::v2i32, MVT::v2f32, MVT::v4i32, MVT::v4f32}, Custom); in R600TargetLowering()
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| H A D | SIISelLowering.cpp | 316 {MVT::v8i32, MVT::v8f32, MVT::v9i32, MVT::v9f32, MVT::v10i32, in SITargetLowering()
317 MVT::v10f32, MVT::v11i32, MVT::v11f32, MVT::v12i32, MVT::v12f32, in SITargetLowering()
318 MVT::v16i32, MVT::v16f32, MVT::v2i64, MVT::v2f64, MVT::v4i16, in SITargetLowering()
319 MVT::v4f16, MVT::v4bf16, MVT::v3i64, MVT::v3f64, MVT::v6i32, in SITargetLowering()
320 MVT::v6f32, MVT::v4i64, MVT::v4f64, MVT::v8i64, MVT::v8f64, in SITargetLowering()
321 MVT::v8i16, MVT::v8f16, MVT::v8bf16, MVT::v16i16, MVT::v16f16, in SITargetLowering()
322 MVT::v16bf16, MVT::v16i64, MVT::v16f64, MVT::v32i32, MVT::v32f32, in SITargetLowering()
618 {MVT::v2i16, MVT::v2f16, MVT::v2bf16, MVT::v4i16, MVT::v4f16, in SITargetLowering()
619 MVT::v4bf16, MVT::v8i16, MVT::v8f16, MVT::v8bf16, MVT::v16i16, in SITargetLowering()
791 for (MVT VT : {MVT::v4i16, MVT::v8i16, MVT::v16i16, MVT::v32i16}) in SITargetLowering()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLoweringHVX.cpp | 34 static const MVT LegalV64[] = { MVT::v64i8, MVT::v32i16, MVT::v16i32 };
35 static const MVT LegalW64[] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 };
36 static const MVT LegalV128[] = { MVT::v128i8, MVT::v64i16, MVT::v32i32 };
37 static const MVT LegalW128[] = { MVT::v256i8, MVT::v128i16, MVT::v64i32 };
98 MVT ByteV = Use64b ? MVT::v64i8 : MVT::v128i8; in initializeHVXLowering()
99 MVT WordV = Use64b ? MVT::v16i32 : MVT::v32i32; in initializeHVXLowering()
100 MVT ByteW = Use64b ? MVT::v128i8 : MVT::v256i8; in initializeHVXLowering()
400 for (MVT T: {MVT::v32i8, MVT::v32i16, MVT::v16i8, MVT::v16i16, MVT::v16i32}) in initializeHVXLowering()
403 for (MVT T: {MVT::v64i8, MVT::v64i16, MVT::v32i8, MVT::v32i16, MVT::v32i32}) in initializeHVXLowering()
432 MVT BoolTy = MVT::getVectorVT(MVT::i1, N); in initializeHVXLowering()
[all …]
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| H A D | HexagonISelLowering.cpp | 1688 for (MVT NativeVT : {MVT::v8i1, MVT::v4i1, MVT::v2i1, MVT::v4i8, in HexagonTargetLowering()
1689 MVT::v8i8, MVT::v2i16, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1711 for (MVT VT : {MVT::v8i8, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1722 for (MVT VT : {MVT::i16, MVT::i32, MVT::v4i8, MVT::i64, MVT::v8i8, in HexagonTargetLowering()
1723 MVT::v2i16, MVT::v4i16, MVT::v2i32}) { in HexagonTargetLowering()
1729 for (MVT VT : {MVT::v2i1, MVT::v4i1, MVT::v8i1}) { in HexagonTargetLowering()
1735 for (MVT VT : {MVT::v2i16, MVT::v4i8, MVT::v8i8, MVT::v2i32, MVT::v4i16, in HexagonTargetLowering()
1747 for (MVT VT : {MVT::i1, MVT::v2i1, MVT::v4i1, MVT::v8i1}) { in HexagonTargetLowering()
1799 for (MVT VT : {MVT::i8, MVT::i16, MVT::i32, MVT::i64, MVT::f32, MVT::f64, in HexagonTargetLowering()
1800 MVT::v2i16, MVT::v2i32, MVT::v4i8, MVT::v4i16, MVT::v8i8}) { in HexagonTargetLowering()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 110 assert((LocVT == MVT::f32 || LocVT == MVT::f128 in Analyze_CC_Sparc64_Full()
1645 for (MVT VT : MVT::fp_valuetypes()) { in SparcTargetLowering()
1652 for (MVT VT : MVT::integer_valuetypes()) in SparcTargetLowering()
2537 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_SINT()
2566 assert(OpVT == MVT::i32 || (OpVT == MVT::i64)); in LowerSINT_TO_FP()
2568 EVT floatVT = (OpVT == MVT::i32) ? MVT::f32 : MVT::f64; in LowerSINT_TO_FP()
2601 assert(VT == MVT::i32 || VT == MVT::i64); in LowerFP_TO_UINT()
2615 assert(OpVT == MVT::i32 || OpVT == MVT::i64); in LowerUINT_TO_FP()
3520 if (VT == MVT::f32 || VT == MVT::i32) in getRegForInlineAsmConstraint()
3522 else if (VT == MVT::f64 || VT == MVT::i64) in getRegForInlineAsmConstraint()
[all …]
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFastISel.cpp | 124 MVT::SimpleValueType getLegalType(MVT::SimpleValueType VT) { in getLegalType()
126 case MVT::i1: in getLegalType()
127 case MVT::i8: in getLegalType()
128 case MVT::i16: in getLegalType()
130 case MVT::i32: in getLegalType()
446 case MVT::i1: in zeroExtendToI32()
453 case MVT::i8: in zeroExtendToI32()
482 case MVT::i1: in signExtendToI32()
483 case MVT::i8: in signExtendToI32()
932 case MVT::i1: in selectSelect()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 537 for (MVT VT : {MVT::bf16, MVT::f16, MVT::v2bf16, MVT::v2f16, MVT::f32, in NVPTXTargetLowering()
538 MVT::f64, MVT::i1, MVT::i8, MVT::i16, MVT::v2i16, MVT::v4i8, in NVPTXTargetLowering()
539 MVT::i32, MVT::i64}) { in NVPTXTargetLowering()
626 for (MVT VT : MVT::integer_valuetypes()) { in NVPTXTargetLowering()
669 for (const auto& Ty : {MVT::i16, MVT::i32, MVT::i64}) { in NVPTXTargetLowering()
754 for (const auto &VT : {MVT::f16, MVT::v2f16}) in NVPTXTargetLowering()
779 for (MVT VT : {MVT::i1, MVT::i16, MVT::i32, MVT::i64}) { in NVPTXTargetLowering()
813 AddPromotedToType(Op, MVT::bf16, MVT::f32); in NVPTXTargetLowering()
5119 if (VT == MVT::f32 || VT == MVT::f64) { in PerformADDCombineWithOperands()
5522 if (!(CCType == MVT::v2i1 && (AType == MVT::v2f16 || AType == MVT::v2bf16))) in PerformSETCCCombine()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.h | 22 bool RetCC_PPC(unsigned ValNo, MVT ValVT, MVT LocVT,
25 bool RetCC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT, MVT LocVT,
28 bool RetCC_PPC_Cold(unsigned ValNo, MVT ValVT, MVT LocVT,
31 bool CC_PPC32_SVR4(unsigned ValNo, MVT ValVT, MVT LocVT,
34 bool CC_PPC64_ELF(unsigned ValNo, MVT ValVT, MVT LocVT,
37 bool CC_PPC64_ELF_FIS(unsigned ValNo, MVT ValVT, MVT LocVT,
40 bool CC_PPC32_SVR4_ByVal(unsigned ValNo, MVT ValVT, MVT LocVT,
43 bool CC_PPC32_SVR4_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
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| H A D | PPCISelLowering.cpp | 241 const MVT ScalarIntVTs[] = { MVT::i32, MVT::i64 }; in PPCTargetLowering()
766 for (MVT VT : { MVT::v16i8, MVT::v8i16, MVT::v4i32 }) { in PPCTargetLowering()
927 for (auto VT : {MVT::v4i32, MVT::v8i16, MVT::v16i8}) in PPCTargetLowering()
1281 for (MVT VT : {MVT::f32, MVT::f64}) { in PPCTargetLowering()
5544 const MVT RegVT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; in prepareDescriptorIndirectCall()
5596 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in buildCallOperands()
6737 const MVT RegVT = IsPPC64 ? MVT::i64 : MVT::i32; in CC_AIX()
7655 const MVT PtrVT = Subtarget.isPPC64() ? MVT::i64 : MVT::i32; in LowerCall_AIX()
8605 MVT IntermediateVT = FourEltRes ? MVT::v4i32 : MVT::v2i64; in LowerINT_TO_FPVector()
9095 MVT::v16i8, MVT::v8i16, MVT::Other, MVT::v4i32 in getCanonicalConstSplat()
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| H A D | PPCFastISel.cpp | 288 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) { in isLoadTypeLegal()
840 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 || in PPCEmitCmp()
1513 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32) in finishCall()
1584 if (RetVT != MVT::isVoid && RetVT != MVT::i8 && RetVT != MVT::i16 && in fastLowerCall()
1585 RetVT != MVT::i32 && RetVT != MVT::i64 && RetVT != MVT::f32 && in fastLowerCall()
1811 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32) in PPCEmitIntExt()
1881 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16) in SelectTrunc()
1884 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8) in SelectTrunc()
2217 if (VT != MVT::i64 && VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && in PPCMaterializeInt()
2351 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8) in tryToFoldLoadIntoMI()
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