Searched refs:LHSReg (Results 1 – 5 of 5) sorted by relevance
| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FastISel.cpp | 1209 if (!LHSReg) in emitAddSub()
1213 LHSReg = emitIntExt(SrcVT, LHSReg, RetVT, IsZExt); in emitAddSub()
1303 if (LHSReg == AArch64::SP || LHSReg == AArch64::WSP || in emitAddSub_rr()
1327 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rr()
1372 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_ri()
1386 assert(LHSReg != AArch64::SP && LHSReg != AArch64::WSP && in emitAddSub_rs()
1413 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rs()
1428 assert(LHSReg != AArch64::XZR && LHSReg != AArch64::WZR && in emitAddSub_rx()
1457 LHSReg = constrainOperandRegClass(II, LHSReg, II.getNumDefs()); in emitAddSub_rx()
1511 if (!LHSReg) in emitFCmp()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 54 ARMCC::CondCodes Cond, unsigned LHSReg, unsigned RHSReg,
502 unsigned LHSReg, unsigned RHSReg, in validOpRegPair() argument
505 return MRI.getType(LHSReg) == MRI.getType(RHSReg) && in validOpRegPair()
506 validReg(MRI, LHSReg, ExpectedSize, ExpectedRegBankID) && in validOpRegPair()
543 auto LHSReg = MIB.getReg(2); in selectCmp() local
545 if (!validOpRegPair(MRI, LHSReg, RHSReg, Helper.OperandSize, in selectCmp()
555 if (!insertComparison(Helper, I, ResReg, ARMConds.first, LHSReg, RHSReg, in selectCmp()
561 if (!insertComparison(Helper, I, IntermediateRes, ARMConds.first, LHSReg, in selectCmp()
564 if (!insertComparison(Helper, I, ResReg, ARMConds.second, LHSReg, RHSReg, in selectCmp()
576 unsigned LHSReg, unsigned RHSReg, in insertComparison() argument
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FastISel.cpp | 2132 Register LHSReg = getRegForValue(LHS); in X86FastEmitCMoveSelect() local
2133 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2186 Register LHSReg = getRegForValue(LHS); in X86FastEmitSSESelect() local
2331 Register LHSReg = getRegForValue(LHS); in X86FastEmitPseudoSelect() local
2333 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
2888 Register LHSReg = getRegForValue(LHS); in fastLowerIntrinsicCall() local
2889 if (LHSReg == 0) in fastLowerIntrinsicCall()
2907 .addReg(LHSReg); in fastLowerIntrinsicCall()
2930 .addReg(LHSReg); in fastLowerIntrinsicCall()
2941 .addReg(LHSReg); in fastLowerIntrinsicCall()
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CombinerHelper.cpp | 2995 Register LHSReg = MI.getOperand(1).getReg(); in matchHoistLogicOpWithSameOpcodeHands() local
4736 Register LHSReg = MI.getOperand(1).getReg(); in matchReassocCommBinOp() local
5799 Register LHSReg = MI.getOperand(1).getReg(); in matchCombineFSubFNegFMulToFMadOrFMA() local
5808 if (mi_match(LHSReg, MRI, m_GFNeg(m_MInstr(FMulMI))) && in matchCombineFSubFNegFMulToFMadOrFMA()
5809 (Aggressive || (MRI.hasOneNonDBGUse(LHSReg) && in matchCombineFSubFNegFMulToFMadOrFMA()
5846 Register LHSReg = MI.getOperand(1).getReg(); in matchCombineFSubFpExtFMulToFMadOrFMA() local
5857 (Aggressive || MRI.hasOneNonDBGUse(LHSReg))) { in matchCombineFSubFpExtFMulToFMadOrFMA()
5881 {NegY, FpExtZ, LHSReg}); in matchCombineFSubFpExtFMulToFMadOrFMA()
5899 Register LHSReg = MI.getOperand(1).getReg(); in matchCombineFSubFpExtFNegFMulToFMadOrFMA() local
6264 Register LHSReg = MI.getOperand(1).getReg(); in applyCommuteBinOpOperands() local
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| /freebsd-14.2/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFastISel.cpp | 312 Register LHSReg = getRegForValue(LHS); in emitLogicalOp() local
313 if (!LHSReg) in emitLogicalOp()
328 emitInst(Opc, ResultReg).addReg(LHSReg).addReg(RHSReg); in emitLogicalOp()
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