Lines Matching refs:LHSReg
2132 Register LHSReg = getRegForValue(LHS); in X86FastEmitCMoveSelect() local
2133 if (!LHSReg || !RHSReg) in X86FastEmitCMoveSelect()
2138 Register ResultReg = fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitCMoveSelect()
2186 Register LHSReg = getRegForValue(LHS); in X86FastEmitSSESelect() local
2190 if (!LHSReg || !RHSReg || !CmpLHSReg || !CmpRHSReg) in X86FastEmitSSESelect()
2217 ImplicitDefReg, LHSReg); in X86FastEmitSSESelect()
2238 Register VBlendReg = fastEmitInst_rrr(BlendOpcode, VR128, RHSReg, LHSReg, in X86FastEmitSSESelect()
2259 Register AndReg = fastEmitInst_rr(Opc[1], VR128, CmpReg, LHSReg); in X86FastEmitSSESelect()
2331 Register LHSReg = getRegForValue(LHS); in X86FastEmitPseudoSelect() local
2333 if (!LHSReg || !RHSReg) in X86FastEmitPseudoSelect()
2339 fastEmitInst_rri(Opc, RC, RHSReg, LHSReg, CC); in X86FastEmitPseudoSelect()
2888 Register LHSReg = getRegForValue(LHS); in fastLowerIntrinsicCall() local
2889 if (LHSReg == 0) in fastLowerIntrinsicCall()
2907 .addReg(LHSReg); in fastLowerIntrinsicCall()
2909 ResultReg = fastEmit_ri(VT, VT, BaseOpc, LHSReg, CI->getZExtValue()); in fastLowerIntrinsicCall()
2917 ResultReg = fastEmit_rr(VT, VT, BaseOpc, LHSReg, RHSReg); in fastLowerIntrinsicCall()
2930 .addReg(LHSReg); in fastLowerIntrinsicCall()
2941 .addReg(LHSReg); in fastLowerIntrinsicCall()
2945 TLI.getRegClassFor(VT), LHSReg, RHSReg); in fastLowerIntrinsicCall()
3072 Register LHSReg = getRegForValue(LHS); in fastLowerIntrinsicCall() local
3074 if (!LHSReg || !RHSReg) in fastLowerIntrinsicCall()
3077 Register ResultReg = fastEmitInst_rr(Opc, RC, LHSReg, RHSReg); in fastLowerIntrinsicCall()