Searched refs:DstBank (Results 1 – 2 of 2) sorted by relevance
1064 const RegisterBank *DstBank = in applyMappingLoad() local1467 const RegisterBank *DstBank = in applyMappingBFE() local1622 const RegisterBank &DstBank = in applyMappingMAD_64_32() local1945 const RegisterBank &DstBank = in foldExtractEltToCmpSelect() local2043 const RegisterBank &DstBank = in foldInsertEltToCmpSelect() local2191 const RegisterBank *DstBank = in applyMappingImpl() local2222 const RegisterBank *DstBank = in applyMappingImpl() local3739 if (!DstBank) in getInstrMapping()3740 DstBank = SrcBank; in getInstrMapping()3841 if (DstBank) { in getInstrMapping()[all …]
555 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_MERGE_VALUES() local558 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_MERGE_VALUES()650 const RegisterBank *DstBank = RBI.getRegBank(Dst, *MRI, TRI); in selectG_BUILD_VECTOR() local651 if (DstBank->getID() == AMDGPU::AGPRRegBankID) in selectG_BUILD_VECTOR()654 assert(DstBank->getID() == AMDGPU::SGPRRegBankID || in selectG_BUILD_VECTOR()655 DstBank->getID() == AMDGPU::VGPRRegBankID); in selectG_BUILD_VECTOR()656 const bool IsVector = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectG_BUILD_VECTOR()821 const RegisterBank *DstBank = RBI.getRegBank(DstReg, *MRI, TRI); in selectG_INSERT() local823 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_INSERT()1480 const bool IsVALU = DstBank->getID() == AMDGPU::VGPRRegBankID; in selectRelocConstant()[all …]