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Searched refs:AVR (Results 1 – 25 of 45) sorted by relevance

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/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/
H A DAVRELFObjectWriter.cpp81 case AVR::fixup_32: in getRelocType()
87 case AVR::fixup_16: in getRelocType()
89 case AVR::fixup_16_pm: in getRelocType()
115 case AVR::fixup_call: in getRelocType()
117 case AVR::fixup_ldi: in getRelocType()
119 case AVR::fixup_6: in getRelocType()
131 case AVR::fixup_8: in getRelocType()
133 case AVR::fixup_8_lo8: in getRelocType()
135 case AVR::fixup_8_hi8: in getRelocType()
139 case AVR::fixup_diff8: in getRelocType()
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H A DAVRELFStreamer.cpp17 if (Features[AVR::ELFArchAVR1]) in getEFlagsForFeatureSet()
19 else if (Features[AVR::ELFArchAVR2]) in getEFlagsForFeatureSet()
21 else if (Features[AVR::ELFArchAVR25]) in getEFlagsForFeatureSet()
23 else if (Features[AVR::ELFArchAVR3]) in getEFlagsForFeatureSet()
25 else if (Features[AVR::ELFArchAVR31]) in getEFlagsForFeatureSet()
27 else if (Features[AVR::ELFArchAVR35]) in getEFlagsForFeatureSet()
29 else if (Features[AVR::ELFArchAVR4]) in getEFlagsForFeatureSet()
31 else if (Features[AVR::ELFArchAVR5]) in getEFlagsForFeatureSet()
33 else if (Features[AVR::ELFArchAVR51]) in getEFlagsForFeatureSet()
35 else if (Features[AVR::ELFArchAVR6]) in getEFlagsForFeatureSet()
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H A DAVRMCExpr.cpp150 AVR::Fixups Kind = AVR::Fixups::LastTargetFixupKind; in getFixupKind()
154 Kind = isNegated() ? AVR::fixup_lo8_ldi_neg : AVR::fixup_lo8_ldi; in getFixupKind()
157 Kind = isNegated() ? AVR::fixup_hi8_ldi_neg : AVR::fixup_hi8_ldi; in getFixupKind()
160 Kind = isNegated() ? AVR::fixup_hh8_ldi_neg : AVR::fixup_hh8_ldi; in getFixupKind()
163 Kind = isNegated() ? AVR::fixup_ms8_ldi_neg : AVR::fixup_ms8_ldi; in getFixupKind()
167 Kind = isNegated() ? AVR::fixup_lo8_ldi_pm_neg : AVR::fixup_lo8_ldi_pm; in getFixupKind()
170 Kind = isNegated() ? AVR::fixup_hi8_ldi_pm_neg : AVR::fixup_hi8_ldi_pm; in getFixupKind()
173 Kind = isNegated() ? AVR::fixup_hh8_ldi_pm_neg : AVR::fixup_hh8_ldi_pm; in getFixupKind()
177 Kind = AVR::fixup_16_pm; in getFixupKind()
180 Kind = AVR::fixup_lo8_ldi_gs; in getFixupKind()
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H A DAVRInstPrinter.cpp44 case AVR::LDRdPtr: in printInst()
45 case AVR::LDRdPtrPi: in printInst()
46 case AVR::LDRdPtrPd: in printInst()
51 if (Opcode == AVR::LDRdPtrPd) in printInst()
56 if (Opcode == AVR::LDRdPtrPi) in printInst()
59 case AVR::STPtrRr: in printInst()
65 case AVR::STPtrPiRr: in printInst()
66 case AVR::STPtrPdRr: in printInst()
69 if (Opcode == AVR::STPtrPdRr) in printInst()
74 if (Opcode == AVR::STPtrPiRr) in printInst()
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H A DAVRAsmBackend.cpp262 case AVR::fixup_7_pcrel: in adjustFixupValue()
268 case AVR::fixup_call: in adjustFixupValue()
271 case AVR::fixup_ldi: in adjustFixupValue()
274 case AVR::fixup_lo8_ldi: in adjustFixupValue()
329 case AVR::fixup_16: in adjustFixupValue()
334 case AVR::fixup_16_pm: in adjustFixupValue()
341 case AVR::fixup_6: in adjustFixupValue()
344 case AVR::fixup_6_adiw: in adjustFixupValue()
348 case AVR::fixup_port5: in adjustFixupValue()
352 case AVR::fixup_port6: in adjustFixupValue()
[all …]
H A DAVRMCCodeEmitter.cpp80 bool IsPredec = Opcode == AVR::LDRdPtrPd || Opcode == AVR::STPtrPdRr; in loadStorePostEncoder()
81 bool IsPostinc = Opcode == AVR::LDRdPtrPi || Opcode == AVR::STPtrPiRr; in loadStorePostEncoder()
91 template <AVR::Fixups Fixup>
109 AVR::fixups::adjustBranchTarget(target); in encodeRelCondBrTarget()
122 case AVR::R27R26: in encodeLDSTPtrReg()
124 case AVR::R29R28: in encodeLDSTPtrReg()
126 case AVR::R31R30: in encodeLDSTPtrReg()
151 case AVR::R31R30: in encodeMemri()
154 case AVR::R29R28: in encodeMemri()
184 template <AVR::Fixups Fixup, unsigned Offset>
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H A DAVRMCCodeEmitter.h50 template <AVR::Fixups Fixup>
72 template <AVR::Fixups Fixup, unsigned Offset>
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp39 : AVRGenInstrInfo(AVR::ADJCALLSTACKDOWN, AVR::ADJCALLSTACKUP), RI(), in AVRInstrInfo()
222 case AVR::BREQk: in getCondFromBranchOpc()
224 case AVR::BRNEk: in getCondFromBranchOpc()
226 case AVR::BRSHk: in getCondFromBranchOpc()
228 case AVR::BRLOk: in getCondFromBranchOpc()
230 case AVR::BRMIk: in getCondFromBranchOpc()
232 case AVR::BRPLk: in getCondFromBranchOpc()
234 case AVR::BRGEk: in getCondFromBranchOpc()
236 case AVR::BRLTk: in getCondFromBranchOpc()
510 case AVR::JMPk: in getBranchDestBlock()
[all …]
H A DAVRRegisterInfo.cpp61 Reserved.set(AVR::R0); in getReservedRegs()
73 for (unsigned Reg = AVR::R2; Reg <= AVR::R17; Reg++) in getReservedRegs()
76 for (unsigned Reg = AVR::R3R2; Reg <= AVR::R18R17; Reg++) in getReservedRegs()
118 if ((Opcode != AVR::SUBIWRdK) && (Opcode != AVR::ADIWRdK)) { in foldFrameOffset()
130 case AVR::SUBIWRdK: in foldFrameOffset()
133 case AVR::ADIWRdK: in foldFrameOffset()
205 case AVR::R25R24: in eliminateFrameIndex()
206 case AVR::R27R26: in eliminateFrameIndex()
244 unsigned AddOpc = AVR::ADIWRdK, SubOpc = AVR::SBIWRdK; in eliminateFrameIndex()
290 return AVR::R28; in getFrameRegister()
[all …]
H A DAVRFrameLowering.cpp108 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
109 .addReg(AVR::SP) in emitPrologue()
133 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
220 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
331 if (Opcode != AVR::STDSPQRr && Opcode != AVR::STDWSPQRr) in fixStackStores()
340 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
373 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
376 BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30) in eliminateCallFramePseudoInstr()
381 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30); in eliminateCallFramePseudoInstr()
404 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
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H A DAVRExpandPseudoInsts.cpp290 return expandArith(AVR::ADDRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
295 return expandArith(AVR::ADCRdRr, AVR::ADCRdRr, MBB, MBBI); in expand()
300 return expandArith(AVR::SUBRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
354 return expandArith(AVR::SBCRdRr, AVR::SBCRdRr, MBB, MBBI); in expand()
860 unsigned OpLo = IsELPM ? AVR::ELPMRdZPi : AVR::LPMRdZPi; in expandLPMWELPMW()
861 unsigned OpHi = IsELPM ? AVR::ELPMRdZ : AVR::LPMRdZ; in expandLPMWELPMW()
873 unsigned Opc = IsELPM ? AVR::ELPM : AVR::LPM; in expandLPMWELPMW()
965 unsigned Opc = IsELPM ? AVR::ELPMRdZ : AVR::LPMRdZ; in expandLPMBELPMB()
973 unsigned Opc = IsELPM ? AVR::ELPM : AVR::LPM; in expandLPMBELPMB()
2633 EXPAND(AVR::SEXT); in expandMI()
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H A DAVRISelLowering.cpp1216 AVR::R25, AVR::R24, AVR::R23, AVR::R22, AVR::R21, AVR::R20,
1217 AVR::R19, AVR::R18, AVR::R17, AVR::R16, AVR::R15, AVR::R14,
1218 AVR::R13, AVR::R12, AVR::R11, AVR::R10, AVR::R9, AVR::R8};
1219 static const MCPhysReg RegList8Tiny[] = {AVR::R25, AVR::R24, AVR::R23,
1220 AVR::R22, AVR::R21, AVR::R20};
1222 AVR::R26R25, AVR::R25R24, AVR::R24R23, AVR::R23R22, AVR::R22R21,
1223 AVR::R21R20, AVR::R20R19, AVR::R19R18, AVR::R18R17, AVR::R17R16,
1224 AVR::R16R15, AVR::R15R14, AVR::R14R13, AVR::R13R12, AVR::R12R11,
1225 AVR::R11R10, AVR::R10R9, AVR::R9R8};
1815 Opc = Tiny ? AVR::ROLBRdR17 : AVR::ROLBRdR1; in insertShift()
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H A DAVRTargetObjectFile.cpp43 if (AVR::isProgramMemoryAddress(GO) && !GO->hasSection() && in SelectSectionForGlobal()
56 AVR::getAddressSpace(GO) != AVR::ProgramMemory) { in SelectSectionForGlobal()
63 switch (AVR::getAddressSpace(GO)) { in SelectSectionForGlobal()
64 case AVR::ProgramMemory: // address space 1 in SelectSectionForGlobal()
66 case AVR::ProgramMemory1: // address space 2 in SelectSectionForGlobal()
68 case AVR::ProgramMemory2: // address space 3 in SelectSectionForGlobal()
70 case AVR::ProgramMemory3: // address space 4 in SelectSectionForGlobal()
72 case AVR::ProgramMemory4: // address space 5 in SelectSectionForGlobal()
74 case AVR::ProgramMemory5: // address space 6 in SelectSectionForGlobal()
H A DAVRISelDAGToDAG.cpp154 Opcode = (isPre) ? AVR::LDRdPtrPd : AVR::LDRdPtrPi; in selectIndexedLoad()
162 Opcode = (isPre) ? AVR::LDWRdPtrPd : AVR::LDWRdPtrPi; in selectIndexedLoad()
193 Opcode = AVR::LPMRdZPi; in selectIndexedProgMemLoad()
263 if (RI.getRegClass(Reg) != &AVR::PTRDISPREGSRegClass) { in SelectInlineAsmMemoryOperand()
334 if (!RN || (RN->getReg() != AVR::SP)) { in select()
344 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr; in select()
359 if (!AVR::isProgramMemoryAccess(LD)) { in select()
367 int ProgMemBank = AVR::getProgramMemoryBank(LD); in select()
404 unsigned Opc = Subtarget->hasLPMX() ? AVR::LPMRdZ : AVR::LPMBRdZ; in select()
475 Subtarget->hasEIJMPCALL() ? AVR::EICALL : AVR::ICALL, DL, MVT::Other, in select()
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H A DAVRRegisterInfo.td19 let Namespace = "AVR";
25 let Namespace = "AVR" in {
114 def GPR8 : RegisterClass<"AVR", [i8], 8,
125 def GPR8lo : RegisterClass<"AVR", [i8], 8,
130 def LD8 : RegisterClass<"AVR", [i8], 8,
140 def LD8lo : RegisterClass<"AVR", [i8], 8,
144 def DREGS : RegisterClass<"AVR", [i16], 8,
159 : RegisterClass<"AVR", [i16], 8,
182 def DLDREGS : RegisterClass<"AVR", [i16], 8,
192 def IWREGS : RegisterClass<"AVR", [i16], 8,
[all …]
H A DAVR.td1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
8 // This is the top level entry point for the AVR target.
18 // AVR Device Definitions
73 def AVR : Target {
H A DAVRSubtarget.h92 return hasTinyEncoding() ? AVR::R16 : AVR::R0; in getTmpRegister()
95 return hasTinyEncoding() ? AVR::R17 : AVR::R1; in getZeroRegister()
H A DREADME.md1 # AVR backend
3 This experimental backend is for the 8-bit Atmel [AVR](https://en.wikipedia.org/wiki/Atmel_AVR) mic…
7 * [Unresolved bugs](https://llvm.org/bugs/buglist.cgi?product=libraries&component=Backend%3A%20AVR&…
H A DAVRCallingConv.td1 //===-- AVRCallingConv.td - Calling Conventions for AVR ----*- tablegen -*-===//
8 // This describes the calling conventions for AVR architecture.
13 // AVR Return Value Calling Convention
23 // AVR Argument Calling Conventions
H A DAVRAsmPrinter.cpp138 ByteNumber % BytesPerReg ? AVR::sub_hi : AVR::sub_lo); in PrintAsmOperand()
167 if (MI->getOperand(OpNum).getReg() == AVR::R31R30) { in PrintAsmMemoryOperand()
169 } else if (MI->getOperand(OpNum).getReg() == AVR::R29R28) { in PrintAsmMemoryOperand()
171 } else if (MI->getOperand(OpNum).getReg() == AVR::R27R26) { in PrintAsmMemoryOperand()
183 assert(MI->getOperand(OpNum).getReg() != AVR::R27R26 && in PrintAsmMemoryOperand()
206 bool IsProgMem = GV->getAddressSpace() == AVR::ProgramMemory; in lowerConstant()
H A DAVRInstrFormats.td1 //===-- AVRInstrInfo.td - AVR Instruction Formats ----------*- tablegen -*-===//
9 // AVR Instruction Format Definitions.
13 // A generic AVR instruction.
16 let Namespace = "AVR";
26 /// A 16-bit AVR instruction.
34 /// a 32-bit AVR instruction.
43 // Pseudo instructions are not real AVR instructions. The DAG stores
44 // pseudo instructions which are replaced by real AVR instructions by
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/
H A DAVRDisassembler.cpp63 AVR::R0, AVR::R1, AVR::R2, AVR::R3, AVR::R4, AVR::R5, AVR::R6,
64 AVR::R7, AVR::R8, AVR::R9, AVR::R10, AVR::R11, AVR::R12, AVR::R13,
65 AVR::R14, AVR::R15, AVR::R16, AVR::R17, AVR::R18, AVR::R19, AVR::R20,
66 AVR::R21, AVR::R22, AVR::R23, AVR::R24, AVR::R25, AVR::R26, AVR::R27,
67 AVR::R28, AVR::R29, AVR::R30, AVR::R31,
271 MCOperand::createReg((Insn & 0x40) ? AVR::R29R28 : AVR::R31R30)); in decodeMemri()
302 {0x000, AVR::BRLOk}, {0x400, AVR::BRSHk}, {0x001, AVR::BREQk}, in decodeCondBranch()
303 {0x401, AVR::BRNEk}, {0x002, AVR::BRMIk}, {0x402, AVR::BRPLk}, in decodeCondBranch()
304 {0x004, AVR::BRLTk}, {0x404, AVR::BRGEk}}; in decodeCondBranch()
323 Inst.setOpcode(Insn & 0x400 ? AVR::BRBCsk : AVR::BRBSsk); in decodeCondBranch()
[all …]
/freebsd-14.2/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp358 if (RegNum == AVR::NoRegister) { in parseRegisterName()
361 if (RegNum == AVR::NoRegister) { in parseRegisterName()
371 if (RegNum == AVR::NoRegister) in parseRegisterName()
378 int RegNum = AVR::NoRegister; in parseRegister()
406 if (RegNo == AVR::NoRegister) in tryParseRegisterOperand()
410 if (AVR::R0 <= RegNo && RegNo <= AVR::R15 && in tryParseRegisterOperand()
411 STI.hasFeature(AVR::FeatureTinyEncoding)) in tryParseRegisterOperand()
572 if (RegNo == AVR::NoRegister) in parseMemriOperand()
598 return Reg == AVR::NoRegister; in parseRegister()
607 if (Reg == AVR::NoRegister) in tryParseRegister()
[all …]
/freebsd-14.2/contrib/llvm-project/lld/ELF/Arch/
H A DAVR.cpp44 class AVR final : public TargetInfo { class
46 AVR() { needsThunks = true; } in AVR() function in __anona8903f9d0111::AVR
58 RelExpr AVR::getRelExpr(RelType type, const Symbol &s, in getRelExpr()
106 bool AVR::needsThunk(RelExpr expr, RelType type, const InputFile *file, in needsThunk()
119 void AVR::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const { in relocate()
272 static AVR target; in getAVRTargetInfo()
280 uint32_t AVR::calcEFlags() const { in calcEFlags()
/freebsd-14.2/sys/contrib/device-tree/Bindings/powerpc/4xx/
H A Dakebono.txt44 1.d) The AVR node
46 The Akebono board has an Atmel AVR microprocessor attached to the I2C
52 - reg : should contain the I2C bus address for the AVR.

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