Lines Matching refs:AVR
62 BuildMI(MBB, MBBI, DL, TII.get(AVR::BSETs)) in emitPrologue()
70 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
74 BuildMI(MBB, MBBI, DL, TII.get(AVR::INRdA), STI.getTmpRegister()) in emitPrologue()
77 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
81 BuildMI(MBB, MBBI, DL, TII.get(AVR::PUSHRr)) in emitPrologue()
84 BuildMI(MBB, MBBI, DL, TII.get(AVR::EORRdRr)) in emitPrologue()
103 (MBBI->getOpcode() == AVR::PUSHRr || MBBI->getOpcode() == AVR::PUSHWRr)) { in emitPrologue()
108 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPREAD), AVR::R29R28) in emitPrologue()
109 .addReg(AVR::SP) in emitPrologue()
114 MBBJ.addLiveIn(AVR::R29R28); in emitPrologue()
122 unsigned Opcode = (isUInt<6>(FrameSize) && STI.hasADDSUBIW()) ? AVR::SBIWRdK in emitPrologue()
123 : AVR::SUBIWRdK; in emitPrologue()
125 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitPrologue()
126 .addReg(AVR::R29R28, RegState::Kill) in emitPrologue()
133 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitPrologue()
134 .addReg(AVR::R29R28) in emitPrologue()
152 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getZeroRegister()); in restoreStatusRegister()
154 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister()); in restoreStatusRegister()
155 BuildMI(MBB, MBBI, DL, TII.get(AVR::OUTARr)) in restoreStatusRegister()
158 BuildMI(MBB, MBBI, DL, TII.get(AVR::POPRd), STI.getTmpRegister()); in restoreStatusRegister()
193 if (Opc != AVR::POPRd && Opc != AVR::POPWRd && !PI->isTerminator()) { in emitEpilogue()
205 Opcode = AVR::ADIWRdK; in emitEpilogue()
207 Opcode = AVR::SUBIWRdK; in emitEpilogue()
212 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(Opcode), AVR::R29R28) in emitEpilogue()
213 .addReg(AVR::R29R28, RegState::Kill) in emitEpilogue()
220 BuildMI(MBB, MBBI, DL, TII.get(AVR::SPWRITE), AVR::SP) in emitEpilogue()
221 .addReg(AVR::R29R28, RegState::Kill); in emitEpilogue()
282 BuildMI(MBB, MI, DL, TII.get(AVR::PUSHRr)) in spillCalleeSavedRegisters()
311 BuildMI(MBB, MI, DL, TII.get(AVR::POPRd), Reg); in restoreCalleeSavedRegisters()
331 if (Opcode != AVR::STDSPQRr && Opcode != AVR::STDWSPQRr) in fixStackStores()
334 assert(MI.getOperand(0).getReg() == AVR::SP && in fixStackStores()
340 (Opcode == AVR::STDWSPQRr) ? AVR::STDWPtrQRr : AVR::STDPtrQRr; in fixStackStores()
343 MI.getOperand(0).setReg(AVR::R31R30); in fixStackStores()
373 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
376 BuildMI(MBB, MI, DL, TII.get(AVR::SUBIWRdK), AVR::R31R30) in eliminateCallFramePseudoInstr()
377 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
381 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP).addReg(AVR::R31R30); in eliminateCallFramePseudoInstr()
397 AddOpcode = AVR::ADIWRdK; in eliminateCallFramePseudoInstr()
399 AddOpcode = AVR::SUBIWRdK; in eliminateCallFramePseudoInstr()
404 BuildMI(MBB, MI, DL, TII.get(AVR::SPREAD), AVR::R31R30).addReg(AVR::SP); in eliminateCallFramePseudoInstr()
406 MachineInstr *New = BuildMI(MBB, MI, DL, TII.get(AddOpcode), AVR::R31R30) in eliminateCallFramePseudoInstr()
407 .addReg(AVR::R31R30, RegState::Kill) in eliminateCallFramePseudoInstr()
411 BuildMI(MBB, MI, DL, TII.get(AVR::SPWRITE), AVR::SP) in eliminateCallFramePseudoInstr()
412 .addReg(AVR::R31R30, RegState::Kill); in eliminateCallFramePseudoInstr()
425 SavedRegs.set(AVR::R29); in determineCalleeSaves()
426 SavedRegs.set(AVR::R28); in determineCalleeSaves()
468 if ((Opcode != AVR::LDDRdPtrQ) && (Opcode != AVR::LDDWRdPtrQ) && in runOnMachineFunction()
469 (Opcode != AVR::STDPtrQRr) && (Opcode != AVR::STDWPtrQRr) && in runOnMachineFunction()
470 (Opcode != AVR::FRMIDX)) { in runOnMachineFunction()