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Searched refs:TargetOpcode (Results 1 – 25 of 226) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64RegisterBankInfo.cpp291 case TargetOpcode::G_OR: { in getInstrAlternativeMappings()
387 case TargetOpcode::G_OR: in applyMappingImpl()
389 case TargetOpcode::G_LOAD: in applyMappingImpl()
407 case TargetOpcode::G_FMA: in isPreISelGenericFloatingPointOpcode()
580 case TargetOpcode::G_ADD: in getInstrMapping()
581 case TargetOpcode::G_SUB: in getInstrMapping()
583 case TargetOpcode::G_MUL: in getInstrMapping()
587 case TargetOpcode::G_AND: in getInstrMapping()
588 case TargetOpcode::G_OR: in getInstrMapping()
589 case TargetOpcode::G_XOR: in getInstrMapping()
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H A DAArch64InstructionSelector.cpp1316 if (Opc == TargetOpcode::G_ANYEXT || Opc == TargetOpcode::G_ZEXT || in getTestBitReg()
1911 case TargetOpcode::G_SHL: in preISelLower()
2167 case TargetOpcode::G_SHL: in earlySelect()
2292 if (Opcode == TargetOpcode::PHI || Opcode == TargetOpcode::G_PHI) { in select()
4574 if (Opc != TargetOpcode::COPY && Opc != TargetOpcode::G_TRUNC) in tryOptSelect()
4590 if (CondOpc != TargetOpcode::G_ICMP && CondOpc != TargetOpcode::G_FCMP) in tryOptSelect()
5390 if (OffsetOpc != TargetOpcode::G_SHL && OffsetOpc != TargetOpcode::G_MUL) { in selectExtendedSHL()
5399 if (OffsetOpc != TargetOpcode::G_SHL && OffsetOpc != TargetOpcode::G_MUL) in selectExtendedSHL()
5911 if (Opc == TargetOpcode::G_SEXT || Opc == TargetOpcode::G_SEXT_INREG) { in getExtendTypeForInst()
5930 if (Opc == TargetOpcode::G_ZEXT || Opc == TargetOpcode::G_ANYEXT) { in getExtendTypeForInst()
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H A DAArch64PostLegalizerCombiner.cpp64 auto *FAddMI = getOpcodeDef(TargetOpcode::G_FADD, Src1, MRI); in matchExtractVecEltPairwiseAdd()
86 std::get<0>(MatchInfo) = TargetOpcode::G_FADD; in matchExtractVecEltPairwiseAdd()
114 return Opc == TargetOpcode::G_SEXT || Opc == TargetOpcode::G_SEXT_INREG; in isSignExtended()
125 assert(MI.getOpcode() == TargetOpcode::G_MUL); in matchAArch64MulConstCombine()
162 if (UseOpc == TargetOpcode::G_ADD || UseOpc == TargetOpcode::G_PTR_ADD || in matchAArch64MulConstCombine()
163 UseOpc == TargetOpcode::G_SUB) in matchAArch64MulConstCombine()
185 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
188 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
198 AddSubOpc = TargetOpcode::G_SUB; in matchAArch64MulConstCombine()
202 AddSubOpc = TargetOpcode::G_ADD; in matchAArch64MulConstCombine()
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H A DAArch64PreLegalizerCombiner.cpp39 assert(MI.getOpcode() == TargetOpcode::G_FCONSTANT); in matchFConstantToConstant()
54 assert(MI.getOpcode() == TargetOpcode::G_FCONSTANT); in applyFConstantToConstant()
66 assert(MI.getOpcode() == TargetOpcode::G_ICMP && KB); in matchICmpRedundantTrunc()
97 assert(MI.getOpcode() == TargetOpcode::G_ICMP); in applyICmpRedundantTrunc()
271 case TargetOpcode::G_CONCAT_VECTORS: in combine()
273 case TargetOpcode::G_SHUFFLE_VECTOR: in combine()
275 case TargetOpcode::G_MEMCPY_INLINE: in combine()
277 case TargetOpcode::G_MEMCPY: in combine()
278 case TargetOpcode::G_MEMMOVE: in combine()
279 case TargetOpcode::G_MEMSET: { in combine()
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/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DGenericMachineInstrs.h66 case TargetOpcode::G_LOAD: in classof()
67 case TargetOpcode::G_STORE: in classof()
68 case TargetOpcode::G_ZEXTLOAD: in classof()
69 case TargetOpcode::G_SEXTLOAD: in classof()
85 case TargetOpcode::G_LOAD: in classof()
86 case TargetOpcode::G_ZEXTLOAD: in classof()
87 case TargetOpcode::G_SEXTLOAD: in classof()
99 return MI->getOpcode() == TargetOpcode::G_LOAD; in classof()
164 case TargetOpcode::G_MERGE_VALUES: in classof()
165 case TargetOpcode::G_CONCAT_VECTORS: in classof()
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H A DUtils.h50 case TargetOpcode::G_VECREDUCE_SEQ_FADD: \
51 case TargetOpcode::G_VECREDUCE_SEQ_FMUL: \
52 case TargetOpcode::G_VECREDUCE_FADD: \
53 case TargetOpcode::G_VECREDUCE_FMUL: \
54 case TargetOpcode::G_VECREDUCE_FMAX: \
55 case TargetOpcode::G_VECREDUCE_FMIN: \
56 case TargetOpcode::G_VECREDUCE_ADD: \
57 case TargetOpcode::G_VECREDUCE_MUL: \
58 case TargetOpcode::G_VECREDUCE_AND: \
64 case TargetOpcode::G_VECREDUCE_UMIN:
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H A DMIPatternMatch.h296 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
314 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_MUL, true>
403 inline UnaryOp_match<SrcTy, TargetOpcode::G_ANYEXT>
410 return UnaryOp_match<SrcTy, TargetOpcode::G_SEXT>(Src);
415 return UnaryOp_match<SrcTy, TargetOpcode::G_ZEXT>(Src);
429 inline UnaryOp_match<SrcTy, TargetOpcode::G_BITCAST>
435 inline UnaryOp_match<SrcTy, TargetOpcode::G_PTRTOINT>
441 inline UnaryOp_match<SrcTy, TargetOpcode::G_INTTOPTR>
447 inline UnaryOp_match<SrcTy, TargetOpcode::G_FPTRUNC>
454 return UnaryOp_match<SrcTy, TargetOpcode::G_FABS>(Src);
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H A DMachineIRBuilder.h552 return buildInstr(TargetOpcode::G_UADDE, {Res, CarryOut}, in buildUAdde()
560 return buildInstr(TargetOpcode::G_USUBE, {Res, CarryOut}, in buildUSube()
568 return buildInstr(TargetOpcode::G_SADDE, {Res, CarryOut}, in buildSAdde()
576 return buildInstr(TargetOpcode::G_SSUBE, {Res, CarryOut}, in buildSSube()
634 return buildInstr(TargetOpcode::G_BITCAST, {Dst}, {Src}); in buildBitcast()
1364 return buildInstr(TargetOpcode::G_FREEZE, {Dst}, {Src}); in buildFreeze()
1542 return buildInstr(TargetOpcode::G_CTPOP, {Dst}, {Src0}); in buildCTPOP()
1547 return buildInstr(TargetOpcode::G_CTLZ, {Dst}, {Src0}); in buildCTLZ()
1557 return buildInstr(TargetOpcode::G_CTTZ, {Dst}, {Src0}); in buildCTTZ()
1567 return buildInstr(TargetOpcode::G_BSWAP, {Dst}, {Src0}); in buildBSwap()
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H A DLegalizationArtifactCombiner.h38 case TargetOpcode::G_TRUNC: in isArtifactCast()
39 case TargetOpcode::G_SEXT: in isArtifactCast()
40 case TargetOpcode::G_ZEXT: in isArtifactCast()
41 case TargetOpcode::G_ANYEXT: in isArtifactCast()
323 assert(Opcode == TargetOpcode::G_ANYEXT || Opcode == TargetOpcode::G_ZEXT || in tryFoldImplicitDef()
1047 case TargetOpcode::G_ZEXT: in tryCombineInstruction()
1050 case TargetOpcode::G_SEXT: in tryCombineInstruction()
1073 case TargetOpcode::G_TRUNC: in tryCombineInstruction()
1123 case TargetOpcode::COPY: in getArtifactSrcReg()
1125 case TargetOpcode::G_ZEXT: in getArtifactSrcReg()
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H A DIRTranslator.h412 return translateBinaryOp(TargetOpcode::G_ADD, U, MIRBuilder); in translateAdd()
415 return translateBinaryOp(TargetOpcode::G_SUB, U, MIRBuilder); in translateSub()
424 return translateBinaryOp(TargetOpcode::G_OR, U, MIRBuilder); in translateOr()
449 return translateCast(TargetOpcode::G_TRUNC, U, MIRBuilder); in translateTrunc()
455 return translateCast(TargetOpcode::G_FPEXT, U, MIRBuilder); in translateFPExt()
458 return translateCast(TargetOpcode::G_FPTOUI, U, MIRBuilder); in translateFPToUI()
461 return translateCast(TargetOpcode::G_FPTOSI, U, MIRBuilder); in translateFPToSI()
464 return translateCast(TargetOpcode::G_UITOFP, U, MIRBuilder); in translateUIToFP()
467 return translateCast(TargetOpcode::G_SITOFP, U, MIRBuilder); in translateSIToFP()
473 return translateCast(TargetOpcode::G_SEXT, U, MIRBuilder); in translateSExt()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DMachineIRBuilder.cpp451 assert((TargetOpcode::G_ANYEXT == ExtOpc || TargetOpcode::G_ZEXT == ExtOpc || in buildExtOrTrunc()
1009 case TargetOpcode::G_FNEG: in buildInstr()
1010 case TargetOpcode::G_ABS: in buildInstr()
1017 case TargetOpcode::G_ADD: in buildInstr()
1018 case TargetOpcode::G_AND: in buildInstr()
1019 case TargetOpcode::G_MUL: in buildInstr()
1020 case TargetOpcode::G_OR: in buildInstr()
1021 case TargetOpcode::G_SUB: in buildInstr()
1022 case TargetOpcode::G_XOR: in buildInstr()
1043 case TargetOpcode::G_SHL: in buildInstr()
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H A DGISelKnownBits.cpp38 case TargetOpcode::COPY: in computeKnownAlignment()
198 case TargetOpcode::COPY: in computeKnownBitsImpl()
199 case TargetOpcode::G_PHI: in computeKnownBitsImpl()
200 case TargetOpcode::PHI: { in computeKnownBitsImpl()
259 case TargetOpcode::G_SUB: { in computeKnownBitsImpl()
268 case TargetOpcode::G_XOR: { in computeKnownBitsImpl()
286 case TargetOpcode::G_ADD: { in computeKnownBitsImpl()
305 case TargetOpcode::G_OR: { in computeKnownBitsImpl()
366 case TargetOpcode::G_FCMP: in computeKnownBitsImpl()
447 case TargetOpcode::G_ZEXT: in computeKnownBitsImpl()
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H A DLegalizerHelper.cpp1932 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in widenScalarMulo()
2209 TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in widenScalar()
2309 TargetOpcode::G_ZEXT : TargetOpcode::G_ANYEXT; in widenScalar()
5272 IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT); in narrowScalarFPTOI()
5942 unsigned RevRot = IsLeft ? TargetOpcode::G_ROTR : TargetOpcode::G_ROTL; in lowerRotateWithReverseRotate()
5963 unsigned RevRot = IsLeft ? TargetOpcode::G_ROTR : TargetOpcode::G_ROTL; in lowerRotate()
5969 unsigned ShOpc = IsLeft ? TargetOpcode::G_SHL : TargetOpcode::G_LSHR; in lowerRotate()
6456 TargetOpcode::G_FMINNUM_IEEE : TargetOpcode::G_FMAXNUM_IEEE; in lowerFMinNumMaxNum()
7192 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in lowerSMULH_UMULH()
7254 Opcode == TargetOpcode::G_SDIVREM ? TargetOpcode::G_SDIV in lowerDIVREM()
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H A DUtils.cpp330 case TargetOpcode::COPY: in getConstantVRegValWithLookThrough()
453 case TargetOpcode::G_ADD: in ConstantFoldBinOp()
455 case TargetOpcode::G_AND: in ConstantFoldBinOp()
457 case TargetOpcode::G_ASHR: in ConstantFoldBinOp()
459 case TargetOpcode::G_LSHR: in ConstantFoldBinOp()
461 case TargetOpcode::G_MUL: in ConstantFoldBinOp()
463 case TargetOpcode::G_OR: in ConstantFoldBinOp()
465 case TargetOpcode::G_SHL: in ConstantFoldBinOp()
467 case TargetOpcode::G_SUB: in ConstantFoldBinOp()
469 case TargetOpcode::G_XOR: in ConstantFoldBinOp()
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H A DCombinerHelper.cpp477 : isa<GSExtLoad>(&MI) ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in matchCombineExtendingLoads()
882 if (Opcode != TargetOpcode::G_LOAD && Opcode != TargetOpcode::G_SEXTLOAD && in matchCombineIndexedLoadStore()
883 Opcode != TargetOpcode::G_ZEXTLOAD && Opcode != TargetOpcode::G_STORE) in matchCombineIndexedLoadStore()
1011 if (Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_UDIV) { in applyCombineDivRem()
1020 Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_SREM; in applyCombineDivRem()
1578 assert((Opc == TargetOpcode::G_MEMCPY || Opc == TargetOpcode::G_MEMMOVE || in tryCombineMemCpyFamily()
1808 if (Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_LSHR) { in applyShiftImmedChain()
2476 (Opc == TargetOpcode::G_SEXT && SrcOpc == TargetOpcode::G_ZEXT)) { in matchCombineExtOfExt()
3962 assert(Opc == TargetOpcode::G_FSHL || Opc == TargetOpcode::G_FSHR); in matchFunnelShiftToRotate()
3968 Opc == TargetOpcode::G_FSHL ? TargetOpcode::G_ROTL : TargetOpcode::G_ROTR; in matchFunnelShiftToRotate()
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H A DCSEInfo.cpp41 case TargetOpcode::G_ADD: in shouldCSEOpc()
42 case TargetOpcode::G_AND: in shouldCSEOpc()
43 case TargetOpcode::G_ASHR: in shouldCSEOpc()
44 case TargetOpcode::G_LSHR: in shouldCSEOpc()
45 case TargetOpcode::G_MUL: in shouldCSEOpc()
46 case TargetOpcode::G_OR: in shouldCSEOpc()
47 case TargetOpcode::G_SHL: in shouldCSEOpc()
48 case TargetOpcode::G_SUB: in shouldCSEOpc()
49 case TargetOpcode::G_XOR: in shouldCSEOpc()
50 case TargetOpcode::G_UDIV: in shouldCSEOpc()
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H A DCSEMIRBuilder.cpp174 case TargetOpcode::G_ADD: in buildInstr()
175 case TargetOpcode::G_AND: in buildInstr()
176 case TargetOpcode::G_ASHR: in buildInstr()
177 case TargetOpcode::G_LSHR: in buildInstr()
178 case TargetOpcode::G_MUL: in buildInstr()
179 case TargetOpcode::G_OR: in buildInstr()
180 case TargetOpcode::G_SHL: in buildInstr()
181 case TargetOpcode::G_SUB: in buildInstr()
182 case TargetOpcode::G_XOR: in buildInstr()
183 case TargetOpcode::G_UDIV: in buildInstr()
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H A DLegacyLegalizerInfo.cpp71 setScalarAction(TargetOpcode::G_ANYEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
72 setScalarAction(TargetOpcode::G_ZEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
73 setScalarAction(TargetOpcode::G_SEXT, 1, {{1, Legal}}); in LegacyLegalizerInfo()
74 setScalarAction(TargetOpcode::G_TRUNC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
75 setScalarAction(TargetOpcode::G_TRUNC, 1, {{1, Legal}}); in LegacyLegalizerInfo()
77 setScalarAction(TargetOpcode::G_INTRINSIC, 0, {{1, Legal}}); in LegacyLegalizerInfo()
83 TargetOpcode::G_ADD, 0, widenToLargerTypesAndNarrowToLargest); in LegacyLegalizerInfo()
85 TargetOpcode::G_OR, 0, widenToLargerTypesAndNarrowToLargest); in LegacyLegalizerInfo()
87 TargetOpcode::G_LOAD, 0, narrowToSmallerAndUnsupportedIfTooSmall); in LegacyLegalizerInfo()
89 TargetOpcode::G_STORE, 0, narrowToSmallerAndUnsupportedIfTooSmall); in LegacyLegalizerInfo()
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H A DIRTranslator.cpp1678 return TargetOpcode::G_BSWAP; in getSimpleIntrinsicOpcode()
1682 return TargetOpcode::G_FSHL; in getSimpleIntrinsicOpcode()
1684 return TargetOpcode::G_FSHR; in getSimpleIntrinsicOpcode()
1686 return TargetOpcode::G_FCEIL; in getSimpleIntrinsicOpcode()
1688 return TargetOpcode::G_FCOS; in getSimpleIntrinsicOpcode()
1692 return TargetOpcode::G_FEXP; in getSimpleIntrinsicOpcode()
1696 return TargetOpcode::G_FABS; in getSimpleIntrinsicOpcode()
1712 return TargetOpcode::G_FMA; in getSimpleIntrinsicOpcode()
1714 return TargetOpcode::G_FLOG; in getSimpleIntrinsicOpcode()
1722 return TargetOpcode::G_FPOW; in getSimpleIntrinsicOpcode()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsRegisterBankInfo.cpp112 case TargetOpcode::G_FADD: in isFloatingPointOpcode()
113 case TargetOpcode::G_FSUB: in isFloatingPointOpcode()
114 case TargetOpcode::G_FMUL: in isFloatingPointOpcode()
115 case TargetOpcode::G_FDIV: in isFloatingPointOpcode()
116 case TargetOpcode::G_FABS: in isFloatingPointOpcode()
117 case TargetOpcode::G_FSQRT: in isFloatingPointOpcode()
118 case TargetOpcode::G_FCEIL: in isFloatingPointOpcode()
120 case TargetOpcode::G_FPEXT: in isFloatingPointOpcode()
134 case TargetOpcode::G_FCMP: in isFloatingPointOpcodeUse()
168 case TargetOpcode::G_LOAD: in isAmbiguous()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86RegisterBankInfo.cpp176 case TargetOpcode::G_ADD: in getInstrMapping()
177 case TargetOpcode::G_SUB: in getInstrMapping()
178 case TargetOpcode::G_MUL: in getInstrMapping()
180 case TargetOpcode::G_FADD: in getInstrMapping()
181 case TargetOpcode::G_FSUB: in getInstrMapping()
182 case TargetOpcode::G_FMUL: in getInstrMapping()
183 case TargetOpcode::G_FDIV: in getInstrMapping()
185 case TargetOpcode::G_SHL: in getInstrMapping()
186 case TargetOpcode::G_LSHR: in getInstrMapping()
203 case TargetOpcode::G_FPEXT: in getInstrMapping()
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H A DX86InstructionSelector.cpp343 case TargetOpcode::G_LOAD: in select()
359 case TargetOpcode::G_ZEXT: in select()
363 case TargetOpcode::G_ICMP: in select()
365 case TargetOpcode::G_FCMP: in select()
381 case TargetOpcode::G_PHI: in select()
383 case TargetOpcode::G_SDIV: in select()
384 case TargetOpcode::G_UDIV: in select()
385 case TargetOpcode::G_SREM: in select()
386 case TargetOpcode::G_UREM: in select()
505 assert((Opc == TargetOpcode::G_STORE || Opc == TargetOpcode::G_LOAD) && in selectLoadStoreOp()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DPatchableFunction.cpp46 case TargetOpcode::IMPLICIT_DEF: in doesNotGeneratecode()
47 case TargetOpcode::KILL: in doesNotGeneratecode()
48 case TargetOpcode::CFI_INSTRUCTION: in doesNotGeneratecode()
49 case TargetOpcode::EH_LABEL: in doesNotGeneratecode()
50 case TargetOpcode::GC_LABEL: in doesNotGeneratecode()
51 case TargetOpcode::DBG_VALUE: in doesNotGeneratecode()
52 case TargetOpcode::DBG_LABEL: in doesNotGeneratecode()
63 TII->get(TargetOpcode::PATCHABLE_FUNCTION_ENTER)); in runOnMachineFunction()
83 TII->get(TargetOpcode::PATCHABLE_OP)) in runOnMachineFunction()
/freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetOpcodes.h20 namespace TargetOpcode {
31 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_START && in isPreISelGenericOpcode()
32 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isPreISelGenericOpcode()
37 return Opcode > TargetOpcode::PRE_ISEL_GENERIC_OPCODE_END; in isTargetSpecificOpcode()
43 return Opcode >= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_START && in isPreISelGenericOptimizationHint()
44 Opcode <= TargetOpcode::PRE_ISEL_GENERIC_OPTIMIZATION_HINT_END; in isPreISelGenericOptimizationHint()
H A DMachineInstr.h1321 case TargetOpcode::IMPLICIT_DEF:
1322 case TargetOpcode::KILL:
1324 case TargetOpcode::EH_LABEL:
1325 case TargetOpcode::GC_LABEL:
1326 case TargetOpcode::DBG_VALUE:
1329 case TargetOpcode::DBG_PHI:
1330 case TargetOpcode::DBG_LABEL:
1332 case TargetOpcode::LIFETIME_END:
1346 case TargetOpcode::PHI:
1347 case TargetOpcode::G_PHI:
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