Lines Matching refs:TargetOpcode
154 if (MI.getOpcode() != TargetOpcode::COPY) in matchCombineCopy()
179 assert(MI.getOpcode() == TargetOpcode::G_CONCAT_VECTORS && in matchCombineConcatVectors()
192 case TargetOpcode::G_BUILD_VECTOR: in matchCombineConcatVectors()
199 case TargetOpcode::G_IMPLICIT_DEF: { in matchCombineConcatVectors()
255 assert(MI.getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR && in matchCombineShuffleVector()
354 CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
366 if (OpcodeForCandidate == TargetOpcode::G_ANYEXT && in ChoosePreferredUse()
367 CurrentUse.ExtendOpcode != TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
369 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ANYEXT && in ChoosePreferredUse()
370 OpcodeForCandidate != TargetOpcode::G_ANYEXT) in ChoosePreferredUse()
376 if (CurrentUse.ExtendOpcode == TargetOpcode::G_SEXT && in ChoosePreferredUse()
377 OpcodeForCandidate == TargetOpcode::G_ZEXT) in ChoosePreferredUse()
379 else if (CurrentUse.ExtendOpcode == TargetOpcode::G_ZEXT && in ChoosePreferredUse()
380 OpcodeForCandidate == TargetOpcode::G_SEXT) in ChoosePreferredUse()
476 ? TargetOpcode::G_ANYEXT in matchCombineExtendingLoads()
477 : isa<GSExtLoad>(&MI) ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in matchCombineExtendingLoads()
480 if (UseMI.getOpcode() == TargetOpcode::G_SEXT || in matchCombineExtendingLoads()
481 UseMI.getOpcode() == TargetOpcode::G_ZEXT || in matchCombineExtendingLoads()
482 (UseMI.getOpcode() == TargetOpcode::G_ANYEXT)) { in matchCombineExtendingLoads()
485 if (MMO.isAtomic() && UseMI.getOpcode() != TargetOpcode::G_ANYEXT) in matchCombineExtendingLoads()
544 Builder.getTII().get(Preferred.ExtendOpcode == TargetOpcode::G_SEXT in applyCombineExtendingLoads()
545 ? TargetOpcode::G_SEXTLOAD in applyCombineExtendingLoads()
546 : Preferred.ExtendOpcode == TargetOpcode::G_ZEXT in applyCombineExtendingLoads()
547 ? TargetOpcode::G_ZEXTLOAD in applyCombineExtendingLoads()
548 : TargetOpcode::G_LOAD)); in applyCombineExtendingLoads()
562 UseMI->getOpcode() == TargetOpcode::G_ANYEXT) { in applyCombineExtendingLoads()
655 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchSextTruncSextLoad()
681 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in applySextTruncSextLoad()
689 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchSextInRegOfLoad()
720 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in applySextInRegOfLoad()
737 Builder.buildLoadInstr(TargetOpcode::G_SEXTLOAD, MI.getOperand(0).getReg(), in applySextInRegOfLoad()
749 assert(Opcode == TargetOpcode::G_LOAD || Opcode == TargetOpcode::G_SEXTLOAD || in findPostIndexCandidate()
750 Opcode == TargetOpcode::G_ZEXTLOAD || Opcode == TargetOpcode::G_STORE); in findPostIndexCandidate()
755 if (BaseDef && BaseDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) in findPostIndexCandidate()
761 if (Use.getOpcode() != TargetOpcode::G_PTR_ADD) in findPostIndexCandidate()
817 assert(Opcode == TargetOpcode::G_LOAD || Opcode == TargetOpcode::G_SEXTLOAD || in findPreIndexCandidate()
818 Opcode == TargetOpcode::G_ZEXTLOAD || Opcode == TargetOpcode::G_STORE); in findPreIndexCandidate()
822 MachineInstr *AddrDef = getOpcodeDef(TargetOpcode::G_PTR_ADD, Addr, MRI); in findPreIndexCandidate()
838 if (BaseDef->getOpcode() == TargetOpcode::G_FRAME_INDEX) { in findPreIndexCandidate()
843 if (MI.getOpcode() == TargetOpcode::G_STORE) { in findPreIndexCandidate()
882 if (Opcode != TargetOpcode::G_LOAD && Opcode != TargetOpcode::G_SEXTLOAD && in matchCombineIndexedLoadStore()
883 Opcode != TargetOpcode::G_ZEXTLOAD && Opcode != TargetOpcode::G_STORE) in matchCombineIndexedLoadStore()
906 bool IsStore = Opcode == TargetOpcode::G_STORE; in applyCombineIndexedLoadStore()
909 case TargetOpcode::G_LOAD: in applyCombineIndexedLoadStore()
910 NewOpcode = TargetOpcode::G_INDEXED_LOAD; in applyCombineIndexedLoadStore()
912 case TargetOpcode::G_SEXTLOAD: in applyCombineIndexedLoadStore()
913 NewOpcode = TargetOpcode::G_INDEXED_SEXTLOAD; in applyCombineIndexedLoadStore()
915 case TargetOpcode::G_ZEXTLOAD: in applyCombineIndexedLoadStore()
916 NewOpcode = TargetOpcode::G_INDEXED_ZEXTLOAD; in applyCombineIndexedLoadStore()
918 case TargetOpcode::G_STORE: in applyCombineIndexedLoadStore()
919 NewOpcode = TargetOpcode::G_INDEXED_STORE; in applyCombineIndexedLoadStore()
951 case TargetOpcode::G_SDIV: in matchCombineDivRem()
952 case TargetOpcode::G_UDIV: { in matchCombineDivRem()
954 IsSigned = Opcode == TargetOpcode::G_SDIV; in matchCombineDivRem()
957 case TargetOpcode::G_SREM: in matchCombineDivRem()
958 case TargetOpcode::G_UREM: { in matchCombineDivRem()
960 IsSigned = Opcode == TargetOpcode::G_SREM; in matchCombineDivRem()
968 DivOpcode = TargetOpcode::G_SDIV; in matchCombineDivRem()
969 RemOpcode = TargetOpcode::G_SREM; in matchCombineDivRem()
970 DivremOpcode = TargetOpcode::G_SDIVREM; in matchCombineDivRem()
972 DivOpcode = TargetOpcode::G_UDIV; in matchCombineDivRem()
973 RemOpcode = TargetOpcode::G_UREM; in matchCombineDivRem()
974 DivremOpcode = TargetOpcode::G_UDIVREM; in matchCombineDivRem()
1011 if (Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_UDIV) { in applyCombineDivRem()
1020 Opcode == TargetOpcode::G_SDIV || Opcode == TargetOpcode::G_SREM; in applyCombineDivRem()
1029 Builder.buildInstr(IsSigned ? TargetOpcode::G_SDIVREM in applyCombineDivRem()
1030 : TargetOpcode::G_UDIVREM, in applyCombineDivRem()
1039 assert(MI.getOpcode() == TargetOpcode::G_BR); in matchOptBrCondByInvertingCond()
1061 if (BrCond->getOpcode() != TargetOpcode::G_BRCOND) in matchOptBrCondByInvertingCond()
1225 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemset()
1325 assert(MI.getOpcode() == TargetOpcode::G_MEMCPY_INLINE); in tryEmitMemcpyInline()
1359 assert(MI.getOpcode() == TargetOpcode::G_MEMCPY_INLINE); in tryEmitMemcpyInline()
1380 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemcpy()
1485 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in optimizeMemmove()
1578 assert((Opc == TargetOpcode::G_MEMCPY || Opc == TargetOpcode::G_MEMMOVE || in tryCombineMemCpyFamily()
1579 Opc == TargetOpcode::G_MEMSET) && "Expected memcpy like instruction"); in tryCombineMemCpyFamily()
1590 if (Opc != TargetOpcode::G_MEMSET) { in tryCombineMemCpyFamily()
1608 if (Opc == TargetOpcode::G_MEMCPY_INLINE) in tryCombineMemCpyFamily()
1619 if (Opc == TargetOpcode::G_MEMCPY) { in tryCombineMemCpyFamily()
1627 if (Opc == TargetOpcode::G_MEMMOVE) in tryCombineMemCpyFamily()
1629 if (Opc == TargetOpcode::G_MEMSET) in tryCombineMemCpyFamily()
1645 case TargetOpcode::G_FNEG: { in constantFoldFpUnary()
1649 case TargetOpcode::G_FABS: { in constantFoldFpUnary()
1653 case TargetOpcode::G_FPTRUNC: in constantFoldFpUnary()
1655 case TargetOpcode::G_FSQRT: { in constantFoldFpUnary()
1661 case TargetOpcode::G_FLOG2: { in constantFoldFpUnary()
1704 if (MI.getOpcode() != TargetOpcode::G_PTR_ADD) in matchPtrAddImmedChain()
1721 if (!Add2Def || Add2Def->getOpcode() != TargetOpcode::G_PTR_ADD) in matchPtrAddImmedChain()
1738 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected G_PTR_ADD"); in applyPtrAddImmedChain()
1758 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in matchShiftImmedChain()
1759 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_SSHLSAT || in matchShiftImmedChain()
1760 Opcode == TargetOpcode::G_USHLSAT) && in matchShiftImmedChain()
1786 if (Opcode == TargetOpcode::G_USHLSAT && in matchShiftImmedChain()
1796 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in applyShiftImmedChain()
1797 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_SSHLSAT || in applyShiftImmedChain()
1798 Opcode == TargetOpcode::G_USHLSAT) && in applyShiftImmedChain()
1808 if (Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_LSHR) { in applyShiftImmedChain()
1839 assert((ShiftOpcode == TargetOpcode::G_SHL || in matchShiftOfShiftedLogic()
1840 ShiftOpcode == TargetOpcode::G_ASHR || in matchShiftOfShiftedLogic()
1841 ShiftOpcode == TargetOpcode::G_LSHR || in matchShiftOfShiftedLogic()
1842 ShiftOpcode == TargetOpcode::G_USHLSAT || in matchShiftOfShiftedLogic()
1843 ShiftOpcode == TargetOpcode::G_SSHLSAT) && in matchShiftOfShiftedLogic()
1853 if (LogicOpcode != TargetOpcode::G_AND && LogicOpcode != TargetOpcode::G_OR && in matchShiftOfShiftedLogic()
1854 LogicOpcode != TargetOpcode::G_XOR) in matchShiftOfShiftedLogic()
1910 assert((Opcode == TargetOpcode::G_SHL || Opcode == TargetOpcode::G_ASHR || in applyShiftOfShiftedLogic()
1911 Opcode == TargetOpcode::G_LSHR || Opcode == TargetOpcode::G_USHLSAT || in applyShiftOfShiftedLogic()
1912 Opcode == TargetOpcode::G_SSHLSAT) && in applyShiftOfShiftedLogic()
1943 assert(MI.getOpcode() == TargetOpcode::G_MUL && "Expected a G_MUL"); in matchCombineMulToShl()
1955 assert(MI.getOpcode() == TargetOpcode::G_MUL && "Expected a G_MUL"); in applyCombineMulToShl()
1960 MI.setDesc(MIB.getTII().get(TargetOpcode::G_SHL)); in applyCombineMulToShl()
1968 assert(MI.getOpcode() == TargetOpcode::G_SHL && KB); in matchCombineShlOfExtend()
1991 if (!isLegalOrBeforeLegalizer({TargetOpcode::G_SHL, {SrcTy, ShiftAmtTy}})) in matchCombineShlOfExtend()
2046 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeMergeToPlainValues()
2052 if (SrcInstr->getOpcode() != TargetOpcode::G_MERGE_VALUES && in matchCombineUnmergeMergeToPlainValues()
2053 SrcInstr->getOpcode() != TargetOpcode::G_BUILD_VECTOR && in matchCombineUnmergeMergeToPlainValues()
2054 SrcInstr->getOpcode() != TargetOpcode::G_CONCAT_VECTORS) in matchCombineUnmergeMergeToPlainValues()
2073 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeMergeToPlainValues()
2099 if (SrcInstr->getOpcode() != TargetOpcode::G_CONSTANT && in matchCombineUnmergeConstant()
2100 SrcInstr->getOpcode() != TargetOpcode::G_FCONSTANT) in matchCombineUnmergeConstant()
2104 APInt Val = SrcInstr->getOpcode() == TargetOpcode::G_CONSTANT in matchCombineUnmergeConstant()
2121 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeConstant()
2136 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeWithDeadLanesToTrunc()
2168 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in matchCombineUnmergeZExtToZExt()
2194 assert(MI.getOpcode() == TargetOpcode::G_UNMERGE_VALUES && in applyCombineUnmergeZExtToZExt()
2201 assert(ZExtInstr && ZExtInstr->getOpcode() == TargetOpcode::G_ZEXT && in applyCombineUnmergeZExtToZExt()
2230 assert((MI.getOpcode() == TargetOpcode::G_SHL || in matchCombineShiftToUnmerge()
2231 MI.getOpcode() == TargetOpcode::G_LSHR || in matchCombineShiftToUnmerge()
2232 MI.getOpcode() == TargetOpcode::G_ASHR) && "Expected a shift"); in matchCombineShiftToUnmerge()
2267 if (MI.getOpcode() == TargetOpcode::G_LSHR) { in applyCombineShiftToUnmerge()
2282 } else if (MI.getOpcode() == TargetOpcode::G_SHL) { in applyCombineShiftToUnmerge()
2296 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in applyCombineShiftToUnmerge()
2337 assert(MI.getOpcode() == TargetOpcode::G_INTTOPTR && "Expected a G_INTTOPTR"); in matchCombineI2PToP2I()
2346 assert(MI.getOpcode() == TargetOpcode::G_INTTOPTR && "Expected a G_INTTOPTR"); in applyCombineI2PToP2I()
2354 assert(MI.getOpcode() == TargetOpcode::G_PTRTOINT && "Expected a G_PTRTOINT"); in matchCombineP2IToI2P()
2360 assert(MI.getOpcode() == TargetOpcode::G_PTRTOINT && "Expected a G_PTRTOINT"); in applyCombineP2IToI2P()
2369 assert(MI.getOpcode() == TargetOpcode::G_ADD); in matchCombineAddP2IToPtrAdd()
2413 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD"); in matchCombineConstPtrAddToI2P()
2431 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD && "Expected a G_PTR_ADD"); in applyCombineConstPtrAddToI2P()
2440 assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT"); in matchCombineAnyExtTrunc()
2449 assert(MI.getOpcode() == TargetOpcode::G_ZEXT && "Expected a G_ZEXT"); in matchCombineZextTrunc()
2464 assert((MI.getOpcode() == TargetOpcode::G_ANYEXT || in matchCombineExtOfExt()
2465 MI.getOpcode() == TargetOpcode::G_SEXT || in matchCombineExtOfExt()
2466 MI.getOpcode() == TargetOpcode::G_ZEXT) && in matchCombineExtOfExt()
2474 (Opc == TargetOpcode::G_ANYEXT && in matchCombineExtOfExt()
2475 (SrcOpc == TargetOpcode::G_SEXT || SrcOpc == TargetOpcode::G_ZEXT)) || in matchCombineExtOfExt()
2476 (Opc == TargetOpcode::G_SEXT && SrcOpc == TargetOpcode::G_ZEXT)) { in matchCombineExtOfExt()
2485 assert((MI.getOpcode() == TargetOpcode::G_ANYEXT || in applyCombineExtOfExt()
2486 MI.getOpcode() == TargetOpcode::G_SEXT || in applyCombineExtOfExt()
2487 MI.getOpcode() == TargetOpcode::G_ZEXT) && in applyCombineExtOfExt()
2504 if (MI.getOpcode() == TargetOpcode::G_ANYEXT || in applyCombineExtOfExt()
2505 (MI.getOpcode() == TargetOpcode::G_SEXT && in applyCombineExtOfExt()
2506 SrcExtOp == TargetOpcode::G_ZEXT)) { in applyCombineExtOfExt()
2515 assert(MI.getOpcode() == TargetOpcode::G_MUL && "Expected a G_MUL"); in applyCombineMulByNegativeOne()
2527 assert(MI.getOpcode() == TargetOpcode::G_FNEG && "Expected a G_FNEG"); in matchCombineFNegOfFNeg()
2533 assert(MI.getOpcode() == TargetOpcode::G_FABS && "Expected a G_FABS"); in matchCombineFAbsOfFAbs()
2541 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in matchCombineTruncOfExt()
2545 if (SrcOpc == TargetOpcode::G_ANYEXT || SrcOpc == TargetOpcode::G_SEXT || in matchCombineTruncOfExt()
2546 SrcOpc == TargetOpcode::G_ZEXT) { in matchCombineTruncOfExt()
2555 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in applyCombineTruncOfExt()
2576 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in matchCombineTruncOfShl()
2586 {TargetOpcode::G_SHL, in matchCombineTruncOfShl()
2600 assert(MI.getOpcode() == TargetOpcode::G_TRUNC && "Expected a G_TRUNC"); in applyCombineTruncOfShl()
2617 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAnyExplicitUseIsUndef()
2624 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAllExplicitUsesAreUndef()
2629 assert(MI.getOpcode() == TargetOpcode::G_SHUFFLE_VECTOR); in matchUndefShuffleVectorMask()
2635 assert(MI.getOpcode() == TargetOpcode::G_STORE); in matchUndefStore()
2636 return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(), in matchUndefStore()
2641 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchUndefSelectCmp()
2642 return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(1).getReg(), in matchUndefSelectCmp()
2647 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchConstantSelectCmp()
2763 assert(MI.getOpcode() == TargetOpcode::G_SELECT); in matchSelectSameVal()
2785 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchOperandIsUndef()
2848 assert(MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT && in matchCombineInsertVecElts()
2857 TargetOpcode::G_INSERT_VECTOR_ELT) in matchCombineInsertVecElts()
2874 if (CurrInst->getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT) in matchCombineInsertVecElts()
2876 if (TmpInst->getOpcode() == TargetOpcode::G_BUILD_VECTOR) { in matchCombineInsertVecElts()
2884 return TmpInst->getOpcode() == TargetOpcode::G_IMPLICIT_DEF; in matchCombineInsertVecElts()
2924 assert(LogicOpcode == TargetOpcode::G_AND || in matchHoistLogicOpWithSameOpcodeHands()
2925 LogicOpcode == TargetOpcode::G_OR || in matchHoistLogicOpWithSameOpcodeHands()
2926 LogicOpcode == TargetOpcode::G_XOR); in matchHoistLogicOpWithSameOpcodeHands()
2964 case TargetOpcode::G_ANYEXT: in matchHoistLogicOpWithSameOpcodeHands()
2965 case TargetOpcode::G_SEXT: in matchHoistLogicOpWithSameOpcodeHands()
2966 case TargetOpcode::G_ZEXT: { in matchHoistLogicOpWithSameOpcodeHands()
2970 case TargetOpcode::G_AND: in matchHoistLogicOpWithSameOpcodeHands()
2971 case TargetOpcode::G_ASHR: in matchHoistLogicOpWithSameOpcodeHands()
2972 case TargetOpcode::G_LSHR: in matchHoistLogicOpWithSameOpcodeHands()
2973 case TargetOpcode::G_SHL: { in matchHoistLogicOpWithSameOpcodeHands()
3023 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in matchAshrShlToSextInreg()
3033 {TargetOpcode::G_SEXT_INREG, {MRI.getType(Src)}})) in matchAshrShlToSextInreg()
3041 assert(MI.getOpcode() == TargetOpcode::G_ASHR); in applyAshShlToSextInreg()
3054 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchOverlappingAnd()
3095 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchRedundantAnd()
3141 assert(MI.getOpcode() == TargetOpcode::G_OR); in matchRedundantOr()
3196 assert(MI.getOpcode() == TargetOpcode::G_XOR); in matchNotCmp()
3226 case TargetOpcode::G_ICMP: in matchNotCmp()
3232 case TargetOpcode::G_FCMP: in matchNotCmp()
3238 case TargetOpcode::G_AND: in matchNotCmp()
3239 case TargetOpcode::G_OR: in matchNotCmp()
3281 case TargetOpcode::G_ICMP: in applyNotCmp()
3282 case TargetOpcode::G_FCMP: { in applyNotCmp()
3289 case TargetOpcode::G_AND: in applyNotCmp()
3290 Def->setDesc(Builder.getTII().get(TargetOpcode::G_OR)); in applyNotCmp()
3292 case TargetOpcode::G_OR: in applyNotCmp()
3293 Def->setDesc(Builder.getTII().get(TargetOpcode::G_AND)); in applyNotCmp()
3306 assert(MI.getOpcode() == TargetOpcode::G_XOR); in matchXorOfAndWithSameReg()
3342 MI.setDesc(Builder.getTII().get(TargetOpcode::G_AND)); in applyXorOfAndWithSameReg()
3367 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD); in applyPtrAddZero()
3390 assert(Root->getOpcode() == TargetOpcode::G_OR && "Expected G_OR only!"); in findCandidatesForLoadOrCombine()
3434 if (const MachineInstr *Or = getOpcodeDef(TargetOpcode::G_OR, OrLHS, MRI)) in findCandidatesForLoadOrCombine()
3438 if (const MachineInstr *Or = getOpcodeDef(TargetOpcode::G_OR, OrRHS, MRI)) in findCandidatesForLoadOrCombine()
3622 assert(MI.getOpcode() == TargetOpcode::G_OR); in matchLoadOrCombine()
3682 if (NeedsBSwap && !isLegalOrBeforeLegalizer({TargetOpcode::G_BSWAP, {Ty}})) in matchLoadOrCombine()
3712 {TargetOpcode::G_LOAD, {Ty, MRI.getType(Ptr)}, {MMDesc}})) in matchLoadOrCombine()
3737 assert(MI.getOpcode() == TargetOpcode::G_PHI); in matchExtendThroughPhis()
3751 case TargetOpcode::G_ANYEXT: in matchExtendThroughPhis()
3753 case TargetOpcode::G_ZEXT: in matchExtendThroughPhis()
3754 case TargetOpcode::G_SEXT: in matchExtendThroughPhis()
3771 case TargetOpcode::G_LOAD: in matchExtendThroughPhis()
3772 case TargetOpcode::G_TRUNC: in matchExtendThroughPhis()
3773 case TargetOpcode::G_SEXT: in matchExtendThroughPhis()
3774 case TargetOpcode::G_ZEXT: in matchExtendThroughPhis()
3775 case TargetOpcode::G_ANYEXT: in matchExtendThroughPhis()
3776 case TargetOpcode::G_CONSTANT: in matchExtendThroughPhis()
3792 assert(MI.getOpcode() == TargetOpcode::G_PHI); in applyExtendThroughPhis()
3821 auto NewPhi = Builder.buildInstrNoInsert(TargetOpcode::G_PHI); in applyExtendThroughPhis()
3838 assert(MI.getOpcode() == TargetOpcode::G_EXTRACT_VECTOR_ELT); in matchExtractVecEltBuildVec()
3844 {TargetOpcode::G_BUILD_VECTOR, {SrcTy, SrcTy.getElementType()}})) in matchExtractVecEltBuildVec()
3853 getOpcodeDef(TargetOpcode::G_BUILD_VECTOR, SrcVec, MRI); in matchExtractVecEltBuildVec()
3855 BuildVecMI = getOpcodeDef(TargetOpcode::G_BUILD_VECTOR_TRUNC, SrcVec, MRI); in matchExtractVecEltBuildVec()
3860 {TargetOpcode::G_BUILD_VECTOR_TRUNC, {SrcTy, ScalarTy}})) in matchExtractVecEltBuildVec()
3894 assert(MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in matchExtractAllEltsFromBuildVector()
3918 if (II.getOpcode() != TargetOpcode::G_EXTRACT_VECTOR_ELT) in matchExtractAllEltsFromBuildVector()
3937 assert(MI.getOpcode() == TargetOpcode::G_BUILD_VECTOR); in applyExtractAllEltsFromBuildVector()
3962 assert(Opc == TargetOpcode::G_FSHL || Opc == TargetOpcode::G_FSHR); in matchFunnelShiftToRotate()
3968 Opc == TargetOpcode::G_FSHL ? TargetOpcode::G_ROTL : TargetOpcode::G_ROTR; in matchFunnelShiftToRotate()
3974 assert(Opc == TargetOpcode::G_FSHL || Opc == TargetOpcode::G_FSHR); in applyFunnelShiftToRotate()
3975 bool IsFSHL = Opc == TargetOpcode::G_FSHL; in applyFunnelShiftToRotate()
3977 MI.setDesc(Builder.getTII().get(IsFSHL ? TargetOpcode::G_ROTL in applyFunnelShiftToRotate()
3978 : TargetOpcode::G_ROTR)); in applyFunnelShiftToRotate()
3985 assert(MI.getOpcode() == TargetOpcode::G_ROTL || in matchRotateOutOfRange()
3986 MI.getOpcode() == TargetOpcode::G_ROTR); in matchRotateOutOfRange()
4000 assert(MI.getOpcode() == TargetOpcode::G_ROTL || in applyRotateOutOfRange()
4001 MI.getOpcode() == TargetOpcode::G_ROTR); in applyRotateOutOfRange()
4016 assert(MI.getOpcode() == TargetOpcode::G_ICMP); in matchICmpToTrueFalseKnownBits()
4070 assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG); in matchBitfieldExtractFromSExtInReg()
4075 if (!LI || !LI->isLegalOrCustom({TargetOpcode::G_SBFX, {Ty, ExtractTy}})) in matchBitfieldExtractFromSExtInReg()
4099 assert(MI.getOpcode() == TargetOpcode::G_AND); in matchBitfieldExtractFromAnd()
4103 TargetOpcode::G_UBFX, Ty, Ty)) in matchBitfieldExtractFromAnd()
4128 B.buildInstr(TargetOpcode::G_UBFX, {Dst}, {ShiftSrc, LSBCst, WidthCst}); in matchBitfieldExtractFromAnd()
4135 assert(PtrAdd.getOpcode() == TargetOpcode::G_PTR_ADD); in reassociationCanBreakAddressingModePattern()
4138 MachineInstr *Src1Def = getOpcodeDef(TargetOpcode::G_PTR_ADD, Src1Reg, MRI); in reassociationCanBreakAddressingModePattern()
4163 while (ConvUseOpc == TargetOpcode::G_INTTOPTR || in reassociationCanBreakAddressingModePattern()
4164 ConvUseOpc == TargetOpcode::G_PTRTOINT) { in reassociationCanBreakAddressingModePattern()
4171 auto LoadStore = ConvUseOpc == TargetOpcode::G_LOAD || in reassociationCanBreakAddressingModePattern()
4172 ConvUseOpc == TargetOpcode::G_STORE; in reassociationCanBreakAddressingModePattern()
4203 assert(MI.getOpcode() == TargetOpcode::G_PTR_ADD); in matchReassocPtrAdd()
4217 if (LHS->getOpcode() != TargetOpcode::G_PTR_ADD) { in matchReassocPtrAdd()
4219 if (RHS->getOpcode() != TargetOpcode::G_ADD) in matchReassocPtrAdd()