| /freebsd-13.1/contrib/llvm-project/compiler-rt/lib/xray/ |
| H A D | xray_mips64.cpp | 34 enum RegNum : uint32_t { enum
105 RegNum::RN_RA, 0x8); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
113 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
117 RegNum::RN_T9, RegNum::RN_T9, 0x10); in patchSled()
123 0x0, RegNum::RN_RA, 0X0); in patchSled()
125 RegNum::RN_T0, LoFunctionID); in patchSled()
127 RegNum::RN_T9, 0x0); in patchSled()
129 RegNum::RN_RA, 0x8); in patchSled()
131 RegNum::RN_SP, 0x10); in patchSled()
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| H A D | xray_mips.cpp | 33 enum RegNum : uint32_t { enum
104 Address[2] = encodeInstruction(PatchOpcodes::PO_SW, RegNum::RN_SP, in patchSled()
105 RegNum::RN_RA, 0x4); in patchSled()
107 RegNum::RN_T9, 0x0); in patchSled()
111 RegNum::RN_T9, LoTracingHookAddr); in patchSled()
115 0x0, RegNum::RN_RA, 0X0); in patchSled()
117 RegNum::RN_T0, LoFunctionID); in patchSled()
119 RegNum::RN_T9, 0x0); in patchSled()
121 RegNum::RN_RA, 0x4); in patchSled()
123 RegNum::RN_SP, 0x8); in patchSled()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCRegisterInfo.cpp | 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum() argument
74 DwarfLLVMRegPair Key = { RegNum, 0 }; in getDwarfRegNum()
76 if (I == M+Size || I->FromReg != RegNum) in getDwarfRegNum()
81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum() argument
88 DwarfLLVMRegPair Key = { RegNum, 0 }; in getLLVMRegNum()
90 if (I != M + Size && I->FromReg == RegNum) in getLLVMRegNum()
104 if (Optional<unsigned> LRegNum = getLLVMRegNum(RegNum, true)) in getDwarfRegNumFromDwarfEHRegNum()
106 return RegNum; in getDwarfRegNumFromDwarfEHRegNum()
109 int MCRegisterInfo::getSEHRegNum(MCRegister RegNum) const { in getSEHRegNum()
111 if (I == L2SEHRegs.end()) return (int)RegNum; in getSEHRegNum()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 142 return RegNum == RHS.RegNum && Offset == RHS.Offset && in operator ==()
570 if (!RegNum) in parseRows()
584 if (!RegNum) in parseRows()
645 for (uint32_t RegNum = 16; RegNum < 32; ++RegNum) { in parseRows() local
664 if (!RegNum) in parseRows()
673 if (!RegNum) in parseRows()
685 if (!RegNum) in parseRows()
698 if (!RegNum) in parseRows()
710 if (!RegNum) in parseRows()
719 if (!RegNum) in parseRows()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
48 if (RegNum != NumArgRegs && RegNum % 2 == 1) { in CC_PPC32_SVR4_Custom_AlignArgRegs()
49 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignArgRegs()
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
68 int RegsLeft = NumArgRegs - RegNum; in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
72 if (RegNum != NumArgRegs && RegsLeft < 4) { in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
74 State.AllocateReg(ArgRegs[RegNum + i]); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128()
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
97 if (RegNum != NumArgRegs && ArgRegs[RegNum] == PPC::F8) { in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
98 State.AllocateReg(ArgRegs[RegNum]); in CC_PPC32_SVR4_Custom_AlignFPArgRegs()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| H A D | AVRAsmParser.cpp | 338 int RegNum = matchFn(Name); in parseRegisterName() local
344 if (RegNum == AVR::NoRegister) { in parseRegisterName()
345 RegNum = matchFn(Name.lower()); in parseRegisterName()
347 if (RegNum == AVR::NoRegister) { in parseRegisterName()
351 return RegNum; in parseRegisterName()
357 if (RegNum == AVR::NoRegister) in parseRegisterName()
360 return RegNum; in parseRegisterName()
364 int RegNum = AVR::NoRegister; in parseRegister() local
386 return RegNum; in parseRegister()
724 RegName << "r" << RegNum; in validateTargetOperandClass()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 66 uint32_t RegNum; /// The register number for Kind == RegPlusOffset. variable
78 : Kind(K), RegNum(InvalidRegisterNumber), Offset(0), AddrSpace(None), in UnwindLocation()
83 : Kind(K), RegNum(Reg), Offset(Off), AddrSpace(AS), Dereference(Deref) {} in UnwindLocation()
86 : Kind(DWARFExpr), RegNum(InvalidRegisterNumber), Offset(0), Expr(E), in UnwindLocation()
130 uint32_t getRegister() const { return RegNum; } in getRegister()
140 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister()
188 Optional<UnwindLocation> getRegisterLocation(uint32_t RegNum) const { in getRegisterLocation() argument
189 auto Pos = Locations.find(RegNum); in getRegisterLocation()
201 Locations.erase(RegNum); in setRegisterLocation()
202 Locations.insert(std::make_pair(RegNum, Location)); in setRegisterLocation()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| H A D | AVRInstPrinter.cpp | 89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, in getPrettyRegisterName() argument
94 unsigned RegLoNum = MRI.getSubReg(RegNum, AVR::sub_lo); in getPrettyRegisterName()
95 RegNum = (RegLoNum != AVR::NoRegister) ? RegLoNum : RegNum; in getPrettyRegisterName()
98 return getRegisterName(RegNum); in getPrettyRegisterName()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| H A D | HexagonAsmParser.cpp | 207 unsigned RegNum; member
254 return Reg.RegNum; in getReg()
435 Op->Reg.RegNum = RegNum; in CreateReg()
1783 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1788 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1800 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1805 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1817 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
1822 std::string Name = r + utostr(RegNum + 1) + Colon + utostr(RegNum); in processInstruction()
1837 std::string Name = r + utostr(RegNum) + Colon + utostr(RegNum - 1); in processInstruction()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| H A D | MSP430AsmParser.cpp | 198 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg() argument
200 return std::make_unique<MSP430Operand>(k_Reg, RegNum, S, E); in CreateReg()
208 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem() argument
211 return std::make_unique<MSP430Operand>(RegNum, Val, S, E); in CreateMem()
214 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg() argument
216 return std::make_unique<MSP430Operand>(k_IndReg, RegNum, S, E); in CreateIndReg()
219 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg() argument
221 return std::make_unique<MSP430Operand>(k_PostIndReg, RegNum, S, E); in CreatePostIndReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 123 unsigned RegNum; member
158 return Reg.RegNum; in getReg()
597 Op->Reg.RegNum = RegNum; in createReg()
698 unsigned RegNum; in parseRegister() local
705 RegNum = MatchRegisterName(Lexer.getTok().getIdentifier()); in parseRegister()
706 if (RegNum == 0) { in parseRegister()
712 return LanaiOperand::createReg(RegNum, Start, End); in parseRegister()
719 bool LanaiAsmParser::ParseRegister(unsigned &RegNum, SMLoc &StartLoc, in ParseRegister() argument
726 RegNum = Op->getReg(); in ParseRegister()
730 OperandMatchResultTy LanaiAsmParser::tryParseRegister(unsigned &RegNum, in tryParseRegister() argument
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| H A D | AArch64AsmParser.cpp | 358 unsigned RegNum; member
1988 Op->Reg.RegNum = RegNum; in CreateReg()
2020 Op->VectorList.RegNum = RegNum; in CreateVectorList()
2201 Op->MatrixReg.RegNum = RegNum; in CreateMatrixRegister()
2646 if (!RegNum) { in matchRegisterNameAlias()
2667 return RegNum; in matchRegisterNameAlias()
2685 RegNum = Reg; in tryParseScalarRegister()
3691 if (RegNum) { in tryParseVectorRegister()
3701 Reg = RegNum; in tryParseVectorRegister()
3873 if (!RegNum) in tryParseMatrixTileList()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 513 int getDwarfRegNum(MCRegister RegNum, bool isEH) const;
517 Optional<unsigned> getLLVMRegNum(unsigned RegNum, bool isEH) const;
521 int getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const;
525 int getSEHRegNum(MCRegister RegNum) const;
529 int getCodeViewRegNum(MCRegister RegNum) const;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/AsmParser/ |
| H A D | VEAsmParser.cpp | 173 unsigned RegNum; member
346 return Reg.RegNum; in getReg()
599 Op->Reg.RegNum = RegNum; in CreateReg()
647 Op.Reg.RegNum = I32Regs[regIdx]; in MorphToI32Reg()
656 Op.Reg.RegNum = F32Regs[regIdx]; in MorphToF32Reg()
665 Op.Reg.RegNum = F128Regs[regIdx / 2]; in MorphToF128Reg()
686 Op.Reg.RegNum = MISCRegs[regIdx]; in MorphToMISCReg()
808 int RegNum = matchFn(Name); in parseRegisterName() local
812 if (RegNum == VE::NoRegister) { in parseRegisterName()
813 RegNum = matchFn(Name.lower()); in parseRegisterName()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/ |
| H A D | M68kMCCodeEmitter.cpp | 154 unsigned RegNum = MCO.getReg(); in encodeReg() local
159 uint32_t Val = RI->getEncodingValue(RegNum); in encodeReg()
166 Buffer |= (uint64_t)M68kII::isAddressRegister(RegNum) << Offset; in encodeReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | InstructionSelectorImpl.h | 903 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
905 OutMIs[InsnID].addDef(RegNum, RegState::Implicit); in executeMatchTable()
908 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
914 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
916 OutMIs[InsnID].addUse(RegNum, RegState::Implicit); in executeMatchTable()
919 << InsnID << "], " << RegNum << ")\n"); in executeMatchTable()
925 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
928 OutMIs[InsnID].addReg(RegNum, RegFlags); in executeMatchTable()
932 << InsnID << "], " << RegNum << ", " << RegFlags << ")\n"); in executeMatchTable()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiRegisterInfo.h | 47 int getDwarfRegNum(unsigned RegNum, bool IsEH) const;
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | StackMaps.cpp | 179 int RegNum = TRI->getDwarfRegNum(Reg, false); in getDwarfRegNum() local
180 for (MCSuperRegIterator SR(Reg, TRI); SR.isValid() && RegNum < 0; ++SR) in getDwarfRegNum()
181 RegNum = TRI->getDwarfRegNum(*SR, false); in getDwarfRegNum()
183 assert(RegNum >= 0 && "Invalid Dwarf register number."); in getDwarfRegNum()
184 return (unsigned)RegNum; in getDwarfRegNum()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 283 auto DecodeRegisterOrImm = [&Inst, Address, Decoder](Field RegNum, in DecodeMoveHRegInstruction()
285 if (30 == RegNum) { in DecodeMoveHRegInstruction()
290 return DecodeGPR32RegisterClass(Inst, RegNum, Address, Decoder); in DecodeMoveHRegInstruction()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/ |
| H A D | SparcAsmParser.cpp | 238 unsigned RegNum; member
324 return Reg.RegNum; in getReg()
438 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind, in CreateReg() argument
441 Op->Reg.RegNum = RegNum; in CreateReg()
471 Op.Reg.RegNum = IntPairRegs[regIdx / 2]; in MorphToIntPairReg()
482 Op.Reg.RegNum = DoubleRegs[regIdx / 2]; in MorphToDoubleReg()
505 Op.Reg.RegNum = Reg; in MorphToQuadReg()
518 Op.Reg.RegNum = CoprocPairRegs[regIdx / 2]; in MorphToCoprocPairReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/AsmParser/ |
| H A D | BPFAsmParser.cpp | 90 unsigned RegNum; member
150 return Reg.RegNum; in getReg()
209 Op->Reg.RegNum = RegNo; in createReg()
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| /freebsd-13.1/contrib/llvm-project/clang/lib/Basic/ |
| H A D | TargetInfo.cpp | 541 if (AN == Name && ARN.RegNum < Names.size()) in isValidGCCRegisterName()
582 if (AN == Name && ARN.RegNum < Names.size()) in getNormalizedGCCRegisterName()
583 return ReturnCanonical ? Names[ARN.RegNum] : Name; in getNormalizedGCCRegisterName()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/CSKY/AsmParser/ |
| H A D | CSKYAsmParser.cpp | 91 unsigned RegNum; member
198 return Reg.RegNum; in getReg()
236 Op->Reg.RegNum = RegNo; in createReg()
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 2492 RegNum = 0; in addVPTPredROperands()
3614 Op->Reg.RegNum = RegNum; in CreateCCOut()
3632 Op->Reg.RegNum = RegNum; in CreateReg()
3751 Op->VectorList.RegNum = RegNum; in CreateVectorList()
3763 Op->VectorList.RegNum = RegNum; in CreateVectorListAllLanes()
3775 Op->VectorList.RegNum = RegNum; in CreateVectorListIndexed()
3824 Op->PostIdxReg.RegNum = RegNum; in CreatePostIdxReg()
4083 if (!RegNum) { in tryParseRegister()
4107 if (!RegNum) { in tryParseRegister()
4120 if (!hasD32() && RegNum >= ARM::D16 && RegNum <= ARM::D31) in tryParseRegister()
[all …]
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| /freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| H A D | PPCInstPrinter.cpp | 608 const char *PPCInstPrinter::getVerboseConditionRegName(unsigned RegNum, in getVerboseConditionRegName() argument
613 if (RegNum < PPC::CR0EQ || RegNum > PPC::CR7UN) in getVerboseConditionRegName()
|