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Searched refs:DefMI (Results 1 – 25 of 69) sorted by relevance

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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/ARM/
H A DMLxExpansionPass.cpp96 if (DefMI->getParent() != MBB) in getAccDefMI()
98 if (DefMI->isCopyLike()) { in getAccDefMI()
101 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
107 DefMI = MRI->getVRegDef(Reg); in getAccDefMI()
113 return DefMI; in getAccDefMI()
149 if (DefMI->getParent() != MBB) in hasLoopHazard()
152 if (DefMI->isPHI()) { in hasLoopHazard()
162 } else if (DefMI->isCopyLike()) { in hasLoopHazard()
165 DefMI = MRI->getVRegDef(Reg); in hasLoopHazard()
179 return DefMI == MI; in hasLoopHazard()
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H A DARMHazardRecognizer.cpp26 static bool hasRAWHazard(MachineInstr *DefMI, MachineInstr *MI, in hasRAWHazard() argument
37 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI); in hasRAWHazard()
52 MachineInstr *DefMI = LastMI; in getHazardType() local
65 DefMI = &*I; in getHazardType()
69 if (TII.isFpMLxInstruction(DefMI->getOpcode()) && in getHazardType()
71 hasRAWHazard(DefMI, MI, TII.getRegisterInfo()))) { in getHazardType()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp185 const MachineInstr *DefMI, unsigned DefOperIdx, in computeOperandLatency() argument
189 return TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
198 unsigned DefClass = DefMI->getDesc().getSchedClass(); in computeOperandLatency()
217 const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI); in computeOperandLatency()
218 unsigned DefIdx = findDefIdx(DefMI, DefOperIdx); in computeOperandLatency()
242 && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef() in computeOperandLatency()
252 return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, *DefMI); in computeOperandLatency()
303 Register Reg = DefMI->getOperand(DefOperIdx).getReg(); in computeOutputLatency()
304 const MachineFunction &MF = *DefMI->getMF(); in computeOutputLatency()
307 return computeInstrLatency(DefMI); in computeOutputLatency()
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H A DLiveRangeEdit.cpp73 assert(DefMI && "Missing instruction"); in checkRematerializable()
75 if (!TII.isTriviallyReMaterializable(*DefMI, aa)) in checkRematerializable()
91 if (!DefMI) in scanRemattable()
93 checkRematerializable(OrigVNI, DefMI, aa); in scanRemattable()
194 if (DefMI && DefMI != MI) in foldAsLoad()
198 DefMI = MI; in foldAsLoad()
208 if (!DefMI || !UseMI) in foldAsLoad()
213 if (!allUsesAvailableAt(DefMI, LIS.getInstructionIndex(*DefMI), in foldAsLoad()
220 if (!DefMI->isSafeToMove(nullptr, SawStore)) in foldAsLoad()
239 DefMI->addRegisterDead(LI->reg(), nullptr); in foldAsLoad()
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H A DMachineTraceMetrics.cpp628 const MachineInstr *DefMI; member
633 : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {} in DataDep()
641 DefMI = DefI->getParent(); in DataDep()
775 unsigned Len = LIR.Height + Cycles[DefMI].Depth; in computeCrossBlockCriticalPath()
802 if (!Dep.DefMI->isTransient()) in updateDepth()
958 if (!Dep.DefMI->isTransient()) in pushDepHeight()
982 Register Reg = DefMI->getOperand(DefOp).getReg(); in addLiveIns()
1119 addLiveIns(Dep.DefMI, Dep.DefOp, Stack); in computeInstrHeights()
1137 LIR.Height = Heights.lookup(DefMI); in computeInstrHeights()
1190 if (!Dep.DefMI->isTransient()) in getPHIDepth()
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H A DPHIElimination.cpp166 MachineInstr *DefMI = MRI->getVRegDef(VirtReg); in runOnMachineFunction() local
167 if (!DefMI) in runOnMachineFunction()
178 MachineBasicBlock *DefMBB = DefMI->getParent(); in runOnMachineFunction()
202 for (MachineInstr *DefMI : ImpDefs) { in runOnMachineFunction()
203 Register DefReg = DefMI->getOperand(0).getReg(); in runOnMachineFunction()
206 LIS->RemoveMachineInstrFromMaps(*DefMI); in runOnMachineFunction()
207 DefMI->eraseFromParent(); in runOnMachineFunction()
484 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg)) in LowerPHINode() local
485 if (DefMI->isImplicitDef()) in LowerPHINode()
486 ImpDefs.insert(DefMI); in LowerPHINode()
H A DRegisterCoalescer.cpp855 if (!DefMI) in removeCopyByCommutingDef()
857 if (!DefMI->isCommutable()) in removeCopyByCommutingDef()
905 << *DefMI); in removeCopyByCommutingDef()
918 if (NewMI != DefMI) { in removeCopyByCommutingDef()
922 MBB->erase(DefMI); in removeCopyByCommutingDef()
1140 if (!DefMI || !DefMI->isFullCopy()) { in removePartialRedundancy()
1305 if (!DefMI) in reMaterializeTrivialDef()
1307 if (DefMI->isCopyLike()) { in reMaterializeTrivialDef()
2678 assert(DefMI != nullptr); in analyzeValue()
2786 if (DefMI && in analyzeValue()
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H A DTwoAddressInstructionPass.cpp206 for (MachineInstr &DefMI : MRI->def_instructions(Reg)) { in getSingleDef()
207 if (DefMI.getParent() != BB || DefMI.isDebugValue()) in getSingleDef()
210 Ret = &DefMI; in getSingleDef()
211 else if (Ret != &DefMI) in getSingleDef()
333 MachineInstr *DefMI = &MI; in isKilled() local
338 if (!isPlainlyKilled(DefMI, Reg, LIS)) in isKilled()
347 DefMI = Begin->getParent(); in isKilled()
891 for (MachineInstr &DefMI : MRI->def_instructions(Reg)) { in isDefTooClose()
892 if (DefMI.getParent() != MBB || DefMI.isCopy() || DefMI.isCopyLike()) in isDefTooClose()
894 if (&DefMI == MI) in isDefTooClose()
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H A DMachineCSE.cpp176 MachineInstr *DefMI = MRI->getVRegDef(Reg); in INITIALIZE_PASS_DEPENDENCY() local
177 if (!DefMI->isCopy()) in INITIALIZE_PASS_DEPENDENCY()
179 Register SrcReg = DefMI->getOperand(1).getReg(); in INITIALIZE_PASS_DEPENDENCY()
182 if (DefMI->getOperand(0).getSubReg()) in INITIALIZE_PASS_DEPENDENCY()
196 if (DefMI->getOperand(1).getSubReg()) in INITIALIZE_PASS_DEPENDENCY()
200 LLVM_DEBUG(dbgs() << "Coalescing: " << *DefMI); in INITIALIZE_PASS_DEPENDENCY()
211 DefMI->changeDebugValuesDefReg(SrcReg); in INITIALIZE_PASS_DEPENDENCY()
213 DefMI->eraseFromParent(); in INITIALIZE_PASS_DEPENDENCY()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64CondBrTuning.cpp66 bool tryToTuneBranch(MachineInstr &MI, MachineInstr &DefMI);
145 if (MI.getParent() != DefMI.getParent()) in tryToTuneBranch()
151 switch (DefMI.getOpcode()) { in tryToTuneBranch()
197 if (isNZCVTouchedInInstructionRange(DefMI, MI, TRI)) in tryToTuneBranch()
200 LLVM_DEBUG(DefMI.print(dbgs())); in tryToTuneBranch()
204 NewCmp = convertToFlagSetting(DefMI, IsFlagSetting); in tryToTuneBranch()
252 if (isNZCVTouchedInInstructionRange(DefMI, MI, TRI)) in tryToTuneBranch()
255 LLVM_DEBUG(DefMI.print(dbgs())); in tryToTuneBranch()
259 NewCmp = convertToFlagSetting(DefMI, IsFlagSetting); in tryToTuneBranch()
278 DefMI.eraseFromParent(); in tryToTuneBranch()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86OptimizeLEAs.cpp352 for (auto DefMI : List) { in chooseBestLEA() local
366 MRI->getRegClass(DefMI->getOperand(0).getReg())) in chooseBestLEA()
373 int DistTemp = calcInstrDist(*DefMI, MI); in chooseBestLEA()
383 BestLEA = DefMI; in chooseBestLEA()
529 MachineInstr *DefMI; in removeRedundantAddrCalc() local
542 DefMI->removeFromParent(); in removeRedundantAddrCalc()
543 MBB->insert(MachineBasicBlock::iterator(&MI), DefMI); in removeRedundantAddrCalc()
544 InstrPos[DefMI] = InstrPos[&MI] - 1; in removeRedundantAddrCalc()
547 assert(((InstrPos[DefMI] == 1 && in removeRedundantAddrCalc()
549 InstrPos[DefMI] > in removeRedundantAddrCalc()
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H A DX86TileConfig.cpp155 for (auto &DefMI : MRI.def_instructions(R)) { in INITIALIZE_PASS_DEPENDENCY() local
156 MachineBasicBlock &MBB = *DefMI.getParent(); in INITIALIZE_PASS_DEPENDENCY()
157 if (DefMI.isMoveImmediate()) { in INITIALIZE_PASS_DEPENDENCY()
160 assert(Imm == DefMI.getOperand(1).getImm() && in INITIALIZE_PASS_DEPENDENCY()
164 Imm = DefMI.getOperand(1).getImm(); in INITIALIZE_PASS_DEPENDENCY()
177 auto Iter = DefMI.getIterator(); in INITIALIZE_PASS_DEPENDENCY()
H A DX86PreTileConfig.cpp216 MachineInstr *DefMI = MRI->getVRegDef(R); in INITIALIZE_PASS_DEPENDENCY() local
217 assert(DefMI && "R must has one define instruction"); in INITIALIZE_PASS_DEPENDENCY()
218 MachineBasicBlock *DefMBB = DefMI->getParent(); in INITIALIZE_PASS_DEPENDENCY()
219 if (DefMI->isMoveImmediate() || !DefVisited.insert(DefMI).second) in INITIALIZE_PASS_DEPENDENCY()
221 if (DefMI->isPHI()) { in INITIALIZE_PASS_DEPENDENCY()
222 for (unsigned I = 1; I < DefMI->getNumOperands(); I += 2) in INITIALIZE_PASS_DEPENDENCY()
223 if (isLoopBackEdge(DefMBB, DefMI->getOperand(I + 1).getMBB())) in INITIALIZE_PASS_DEPENDENCY()
224 RecordShape(DefMI, DefMBB); // In this case, PHI is also a shape def. in INITIALIZE_PASS_DEPENDENCY()
226 WorkList.push_back(DefMI->getOperand(I).getReg()); in INITIALIZE_PASS_DEPENDENCY()
228 RecordShape(DefMI, DefMBB); in INITIALIZE_PASS_DEPENDENCY()
H A DX86CallFrameOptimization.cpp620 MachineInstr &DefMI = *MRI->getVRegDef(Reg); in canFoldIntoRegPush() local
624 if ((DefMI.getOpcode() != X86::MOV32rm && in canFoldIntoRegPush()
625 DefMI.getOpcode() != X86::MOV64rm) || in canFoldIntoRegPush()
626 DefMI.getParent() != FrameSetup->getParent()) in canFoldIntoRegPush()
631 for (MachineBasicBlock::iterator I = DefMI; I != FrameSetup; ++I) in canFoldIntoRegPush()
635 return &DefMI; in canFoldIntoRegPush()
/freebsd-13.1/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp387 auto *DefMI = MRI.getVRegDef(Reg); in getDefSrcRegIgnoringCopies() local
391 unsigned Opc = DefMI->getOpcode(); in getDefSrcRegIgnoringCopies()
393 Register SrcReg = DefMI->getOperand(1).getReg(); in getDefSrcRegIgnoringCopies()
397 DefMI = MRI.getVRegDef(SrcReg); in getDefSrcRegIgnoringCopies()
399 Opc = DefMI->getOpcode(); in getDefSrcRegIgnoringCopies()
421 return DefMI && DefMI->getOpcode() == Opcode ? DefMI : nullptr; in getOpcodeDef()
548 const MachineInstr *DefMI = MRI.getVRegDef(Val); in isKnownNeverNaN() local
549 if (!DefMI) in isKnownNeverNaN()
563 for (const auto &Op : DefMI->uses()) in isKnownNeverNaN()
569 switch (DefMI->getOpcode()) { in isKnownNeverNaN()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsOptimizePICCall.cpp280 MachineInstr *DefMI = MRI.getVRegDef(Reg); in isCallViaRegister() local
282 assert(DefMI); in isCallViaRegister()
286 if (!DefMI->mayLoad() || DefMI->getNumOperands() < 3) in isCallViaRegister()
289 unsigned Flags = DefMI->getOperand(2).getTargetFlags(); in isCallViaRegister()
295 assert(DefMI->hasOneMemOperand()); in isCallViaRegister()
296 Val = (*DefMI->memoperands_begin())->getValue(); in isCallViaRegister()
298 Val = (*DefMI->memoperands_begin())->getPseudoValue(); in isCallViaRegister()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFMIPeephole.cpp464 MachineInstr *DefMI; in eliminateTruncSeq() local
491 DefMI = MRI->getVRegDef(SrcReg); in eliminateTruncSeq()
492 if (DefMI) in eliminateTruncSeq()
498 DefMI = MRI->getVRegDef(SrcReg); in eliminateTruncSeq()
500 if (!DefMI) in eliminateTruncSeq()
514 if (DefMI->isPHI()) { in eliminateTruncSeq()
517 for (unsigned i = 1, e = DefMI->getNumOperands(); i < e; i += 2) { in eliminateTruncSeq()
518 MachineOperand &opnd = DefMI->getOperand(i); in eliminateTruncSeq()
534 } else if (!TruncSizeCompatible(TruncSize, DefMI->getOpcode())) { in eliminateTruncSeq()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.h209 bool simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,
213 bool transformToNewImmFormFedByAdd(MachineInstr &MI, MachineInstr &DefMI,
219 MachineInstr &DefMI) const;
223 unsigned ConstantOpNo, MachineInstr &DefMI,
238 bool isDefMIElgibleForForwarding(MachineInstr &DefMI,
243 const MachineInstr &DefMI,
248 const MachineInstr &DefMI,
321 const MachineInstr &DefMI, unsigned DefIdx,
332 const MachineInstr &DefMI, in hasLowDefLatency() argument
477 bool FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, Register Reg,
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H A DPPCMIPeephole.cpp520 if (!DefMI) in simplifyCode()
523 unsigned DefOpc = DefMI->getOpcode(); in simplifyCode()
602 .add(DefMI->getOperand(1)); in simplifyCode()
628 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
629 if (!DefMI) in simplifyCode()
631 unsigned DefOpcode = DefMI->getOpcode(); in simplifyCode()
673 LLVM_DEBUG(DefMI->dump()); in simplifyCode()
674 ToErase = DefMI; in simplifyCode()
692 MachineInstr *DefMI = MRI->getVRegDef(TrueReg); in simplifyCode() local
696 if (DefMI && DefMI->getOpcode() == PPC::XXPERMDI) { in simplifyCode()
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H A DPPCInstrInfo.cpp173 if (!DefMI.getParent()) in getOperandLatency()
3247 if (DefMI->getOpcode() == PPC::LI || DefMI->getOpcode() == PPC::LI8 || in getForwardingDefMI()
3255 if (DefMI->getOpcode() == PPC::LI || DefMI->getOpcode() == PPC::LI8) in getForwardingDefMI()
3292 if (DefMI) { in getForwardingDefMI()
3304 return DefMI; in getForwardingDefMI()
3665 if (!DefMI) in convertToImmediateForm()
3672 *KilledDef = DefMI; in convertToImmediateForm()
4394 if ((&*It) == &DefMI) in isRegElgibleForForwarding()
4462 if ((DefMI.getOpcode() != PPC::LI && DefMI.getOpcode() != PPC::LI8) || in simplifyToLI()
4763 LLVM_DEBUG(DefMI.dump()); in transformToNewImmFormFedByAdd()
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H A DPPCVSXSwapRemoval.cpp618 MachineInstr* DefMI = MRI->getVRegDef(Reg); in formWebs() local
619 assert(SwapMap.find(DefMI) != SwapMap.end() && in formWebs()
621 int DefIdx = SwapMap[DefMI]; in formWebs()
629 LLVM_DEBUG(DefMI->dump()); in formWebs()
723 MachineInstr *DefMI = MRI->getVRegDef(UseReg); in recordUnoptimizableWebs() local
724 Register DefReg = DefMI->getOperand(0).getReg(); in recordUnoptimizableWebs()
725 int DefIdx = SwapMap[DefMI]; in recordUnoptimizableWebs()
735 LLVM_DEBUG(DefMI->dump()); in recordUnoptimizableWebs()
754 LLVM_DEBUG(DefMI->dump()); in recordUnoptimizableWebs()
801 int DefIdx = SwapMap[DefMI]; in markSwapsForRemoval()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiInstrInfo.cpp498 MachineInstr *DefMI = canFoldIntoSelect(MI.getOperand(1).getReg(), MRI); in optimizeSelect() local
499 bool Invert = !DefMI; in optimizeSelect()
500 if (!DefMI) in optimizeSelect()
501 DefMI = canFoldIntoSelect(MI.getOperand(2).getReg(), MRI); in optimizeSelect()
502 if (!DefMI) in optimizeSelect()
514 BuildMI(*MI.getParent(), MI, MI.getDebugLoc(), DefMI->getDesc(), DestReg); in optimizeSelect()
517 const MCInstrDesc &DefDesc = DefMI->getDesc(); in optimizeSelect()
520 NewMI.add(DefMI->getOperand(i)); in optimizeSelect()
538 SeenMIs.erase(DefMI); in optimizeSelect()
544 if (DefMI->getParent() != MI.getParent()) in optimizeSelect()
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/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp493 if (MachineInstr *DefMI = MRI->getVRegDef(Require.getAVLReg())) { in needVSETVLI() local
494 if (DefMI->getOpcode() == RISCV::PseudoVSETVLI || in needVSETVLI()
495 DefMI->getOpcode() == RISCV::PseudoVSETIVLI) { in needVSETVLI()
496 VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI); in needVSETVLI()
616 MachineInstr *DefMI = MRI->getVRegDef(InReg); in needVSETVLIPHI() local
617 if (!DefMI || (DefMI->getOpcode() != RISCV::PseudoVSETVLI && in needVSETVLIPHI()
618 DefMI->getOpcode() != RISCV::PseudoVSETIVLI)) in needVSETVLIPHI()
623 VSETVLIInfo DefInfo = getInfoForVSETVLI(*DefMI); in needVSETVLIPHI()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFixSGPRCopies.cpp625 MachineInstr *DefMI = MRI->getVRegDef(SrcReg); in runOnMachineFunction() local
630 if (isSafeToFoldImmIntoCopy(&MI, DefMI, TII, SMovOp, Imm)) { in runOnMachineFunction()
736 MachineInstr *DefMI = MRI->getVRegDef(MO->getReg()); in runOnMachineFunction() local
737 if (DefMI && TII->isFoldableCopy(*DefMI)) { in runOnMachineFunction()
738 const MachineOperand &Def = DefMI->getOperand(0); in runOnMachineFunction()
742 const MachineOperand &Copied = DefMI->getOperand(1); in runOnMachineFunction()
827 MachineInstr *DefMI = MRI->getVRegDef(MI.getOperand(I).getReg()); in processPHINode() local
828 if (DefMI && DefMI->isPHI()) in processPHINode()
829 PHIOperands.insert(DefMI); in processPHINode()
/freebsd-13.1/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEInstrInfo.cpp546 bool VEInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate() argument
552 switch (DefMI.getOpcode()) { in FoldImmediate()
558 LLVM_DEBUG(DefMI.dump()); in FoldImmediate()
560 assert(DefMI.getOperand(1).isImm()); in FoldImmediate()
561 assert(DefMI.getOperand(2).isImm()); in FoldImmediate()
563 DefMI.getOperand(1).getImm() + mimm2Val(DefMI.getOperand(2).getImm()); in FoldImmediate()
569 LLVM_DEBUG(DefMI.dump()); in FoldImmediate()
571 assert(DefMI.getOperand(2).isImm()); in FoldImmediate()
572 if (!DefMI.getOperand(3).isImm()) in FoldImmediate()
575 ImmVal = DefMI.getOperand(2).getImm() + DefMI.getOperand(3).getImm(); in FoldImmediate()
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