854   MachineInstr *DefMI = LIS->getInstructionFromIndex(AValNo->def);  in removeCopyByCommutingDef()  local
855   if (!DefMI)  in removeCopyByCommutingDef()
857   if (!DefMI->isCommutable())  in removeCopyByCommutingDef()
861   int DefIdx = DefMI->findRegisterDefOperandIdx(IntA.reg());  in removeCopyByCommutingDef()
864   if (!DefMI->isRegTiedToUseOperand(DefIdx, &UseOpIdx))  in removeCopyByCommutingDef()
877   if (!TII->findCommutedOpIndices(*DefMI, UseOpIdx, NewDstIdx))  in removeCopyByCommutingDef()
880   MachineOperand &NewDstMO = DefMI->getOperand(NewDstIdx);  in removeCopyByCommutingDef()
905                     << *DefMI);  in removeCopyByCommutingDef()
909   MachineBasicBlock *MBB = DefMI->getParent();  in removeCopyByCommutingDef()
911       TII->commuteInstruction(*DefMI, false, UseOpIdx, NewDstIdx);  in removeCopyByCommutingDef()
918   if (NewMI != DefMI) {  in removeCopyByCommutingDef()
919     LIS->ReplaceMachineInstrInMaps(*DefMI, *NewMI);  in removeCopyByCommutingDef()
920     MachineBasicBlock::iterator Pos = DefMI;  in removeCopyByCommutingDef()
922     MBB->erase(DefMI);  in removeCopyByCommutingDef()
1139     MachineInstr *DefMI = LIS->getInstructionFromIndex(PVal->def);  in removePartialRedundancy()  local
1140     if (!DefMI || !DefMI->isFullCopy()) {  in removePartialRedundancy()
1145     if (DefMI->getOperand(0).getReg() != IntA.reg() ||  in removePartialRedundancy()
1146         DefMI->getOperand(1).getReg() != IntB.reg() ||  in removePartialRedundancy()
1147         DefMI->getParent() != Pred) {  in removePartialRedundancy()
1304   MachineInstr *DefMI = LIS->getInstructionFromIndex(ValNo->def);  in reMaterializeTrivialDef()  local
1305   if (!DefMI)  in reMaterializeTrivialDef()
1307   if (DefMI->isCopyLike()) {  in reMaterializeTrivialDef()
1311   if (!TII->isAsCheapAsAMove(*DefMI))  in reMaterializeTrivialDef()
1313   if (!TII->isTriviallyReMaterializable(*DefMI, AA))  in reMaterializeTrivialDef()
1315   if (!definesFullReg(*DefMI, SrcReg))  in reMaterializeTrivialDef()
1318   if (!DefMI->isSafeToMove(AA, SawStore))  in reMaterializeTrivialDef()
1320   const MCInstrDesc &MCID = DefMI->getDesc();  in reMaterializeTrivialDef()
1338   if (!DefMI->isImplicitDef()) {  in reMaterializeTrivialDef()
1343                                               DefMI->getOperand(0).getSubReg());  in reMaterializeTrivialDef()
1359   if (!allUsesAvailableAt(DefMI, ValNo->def, CopyIdx))  in reMaterializeTrivialDef()
1366   TII->reMaterialize(*MBB, MII, DstReg, SrcIdx, *DefMI, *TRI);  in reMaterializeTrivialDef()
2455   LaneBitmask computeWriteLanes(const MachineInstr *DefMI, bool &Redef) const;
2568 LaneBitmask JoinVals::computeWriteLanes(const MachineInstr *DefMI, bool &Redef)  in computeWriteLanes()  argument
2571   for (const MachineOperand &MO : DefMI->operands()) {  in computeWriteLanes()
2670   const MachineInstr *DefMI = nullptr;  in analyzeValue()  local
2677     DefMI = Indexes->getInstructionFromIndex(VNI->def);  in analyzeValue()
2678     assert(DefMI != nullptr);  in analyzeValue()
2682       if (DefMI->isImplicitDef()) {  in analyzeValue()
2688       V.ValidLanes = V.WriteLanes = computeWriteLanes(DefMI, Redef);  in analyzeValue()
2716       if (DefMI->isImplicitDef()) {  in analyzeValue()
2786     if (DefMI &&  in analyzeValue()
2787         DefMI->getParent() != Indexes->getMBBFromIndex(V.OtherVNI->def)) {  in analyzeValue()
2790                  << printMBBReference(*DefMI->getParent())  in analyzeValue()
2805   if (DefMI->isImplicitDef())  in analyzeValue()
2810   if (CP.isCoalescable(DefMI)) {  in analyzeValue()
2827   if (DefMI->isFullCopy() && !CP.isPartial() &&  in analyzeValue()