185   const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOperandLatency()  argument
189     return TII->defaultDefLatency(SchedModel, *DefMI);  in computeOperandLatency()
194       OperLatency = TII->getOperandLatency(&InstrItins, *DefMI, DefOperIdx,  in computeOperandLatency()
198       unsigned DefClass = DefMI->getDesc().getSchedClass();  in computeOperandLatency()
205     unsigned InstrLatency = TII->getInstrLatency(&InstrItins, *DefMI);  in computeOperandLatency()
213         std::max(InstrLatency, TII->defaultDefLatency(SchedModel, *DefMI));  in computeOperandLatency()
217   const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOperandLatency()
218   unsigned DefIdx = findDefIdx(DefMI, DefOperIdx);  in computeOperandLatency()
241   if (SCDesc->isValid() && !DefMI->getOperand(DefOperIdx).isImplicit()  in computeOperandLatency()
242       && !DefMI->getDesc().OpInfo[DefOperIdx].isOptionalDef()  in computeOperandLatency()
245            << *DefMI << " (Try with MCSchedModel.CompleteModel set to false)";  in computeOperandLatency()
252   return DefMI->isTransient() ? 0 : TII->defaultDefLatency(SchedModel, *DefMI);  in computeOperandLatency()
290 computeOutputLatency(const MachineInstr *DefMI, unsigned DefOperIdx,  in computeOutputLatency()  argument
303   Register Reg = DefMI->getOperand(DefOperIdx).getReg();  in computeOutputLatency()
304   const MachineFunction &MF = *DefMI->getMF();  in computeOutputLatency()
307     return computeInstrLatency(DefMI);  in computeOutputLatency()
312     const MCSchedClassDesc *SCDesc = resolveSchedClass(DefMI);  in computeOutputLatency()